This file is a user guide to the GNU assembler as version
2.12.1.
This document is distributed under the terms of the GNU Free Documentation License. A copy of the license is included in the section entitled "GNU Free Documentation License".
Here is a brief summary of how to invoke as. For details,
see Comand-Line Options.
as [-a[cdhlns][=file]] [-D] [--defsym sym=val]
[-f] [--gstabs] [--gdwarf2] [--help] [-I dir]
[-J] [-K] [-L]
[--listing-lhs-width=NUM] [--listing-lhs-width2=NUM]
[--listing-rhs-width=NUM] [--listing-cont-lines=NUM]
[--keep-locals] [-o objfile] [-R] [--statistics] [-v]
[-version] [--version] [-W] [--warn] [--fatal-warnings]
[-w] [-x] [-Z] [--target-help] [target-options]
[--|files ...]
Target Alpha options:
[-mcpu]
[-mdebug | -no-mdebug]
[-relax] [-g] [-Gsize]
[-F] [-32addr]
Target ARC options:
[-marc[5|6|7|8]]
[-EB|-EL]
Target ARM options:
[-mcpu=processor[+extension...]]
[-march=architecture[+extension...]]
[-mfpu=floating-point-fromat]
[-mthumb]
[-EB|-EL]
[-mapcs-32|-mapcs-26|-mapcs-float|
-mapcs-reentrant]
[-mthumb-interwork] [-moabi] [-k]
Target CRIS options:
[--underscore | --no-underscore]
[--pic] [-N]
[--emulation=criself | --emulation=crisaout]
Target D10V options:
[-O]
Target D30V options:
[-O|-n|-N]
Target i386 options:
[--32|--64]
Target i960 options:
[-ACA|-ACA_A|-ACB|-ACC|-AKA|-AKB|
-AKC|-AMC]
[-b] [-no-relax]
Target M32R options:
[--m32rx|--[no-]warn-explicit-parallel-conflicts|
--W[n]p]
Target M680X0 options:
[-l] [-m68000|-m68010|-m68020|...]
Target M68HC11 options:
[-m68hc11|-m68hc12]
[--force-long-branchs] [--short-branchs]
[--strict-direct-mode] [--print-insn-syntax]
[--print-opcodes] [--generate-example]
Target MCORE options:
[-jsri2bsr] [-sifilter] [-relax]
[-mcpu=[210|340]]
Target MIPS options:
[-nocpp] [-EL] [-EB] [-G num] [-mcpu=CPU ]
[-mips1] [-mips2] [-mips3] [-mips4] [-mips5]
[-mips32] [-mips64]
[-m4650] [-no-m4650]
[--trap] [--break] [-n]
[--emulation=name ]
Target MMIX options:
[--fixed-special-register-names] [--globalize-symbols]
[--gnu-syntax] [--relax] [--no-predefined-symbols]
[--no-expand] [--no-merge-gregs] [-x]
[--linker-allocated-gregs]
Target PDP11 options:
[-mpic|-mno-pic] [-mall] [-mno-extensions]
[-mextension|-mno-extension]
[-mcpu] [-mmachine]
Target picoJava options:
[-mb|-me]
Target PowerPC options:
[-mpwrx|-mpwr2|-mpwr|-m601|-mppc|-mppc32|-m603|-m604|
-m403|-m405|-mppc64|-m620|-mppc64bridge|-mbooke|
-mbooke32|-mbooke64]
[-mcom|-many|-maltivec] [-memb]
[-mregnames|-mno-regnames]
[-mrelocatable|-mrelocatable-lib]
[-mlittle|-mlittle-endian|-mbig|-mbig-endian]
[-msolaris|-mno-solaris]
Target SPARC options:
[-Av6|-Av7|-Av8|-Asparclet|-Asparclite
-Av8plus|-Av8plusa|-Av9|-Av9a]
[-xarch=v8plus|-xarch=v8plusa] [-bump]
[-32|-64]
-a[cdhlmns]
-ac
-ad
-ah
-al
-am
-an
-as
=file
You may combine these options; for example, use -aln for assembly
listing without forms processing. The =file option, if used, must be
the last one. By itself, -a defaults to -ahls.
-D
--defsym sym=value
0x
indicates a hexadecimal value, and a leading 0 indicates an octal value.
-f
--gstabs
--gdwarf2
--help
--target-help
-I dir
.include directives.
-J
-K
-L
--keep-locals
L, but different systems have different local
label prefixes.
--listing-lhs-width=number
--listing-lhs-width2=number
--listing-rhs-width=number
--listing-cont-lines=number
-o objfile
as objfile.
-R
--statistics
--strip-local-absolute
-v
-version
as version.
--version
as version and exit.
-W
--no-warn
--fatal-warnings
--warn
-w
-x
-Z
-- | files ...
The following options are available when as is configured for an ARC processor.
-marc[5|6|7|8]
-EB | -EL
The following options are available when as is configured for the ARM processor family.
-mcpu=processor[+extension...]
-march=architecture[+extension...]
-mfpu=floating-point-format
-mthumb
-mapcs-32 | -mapcs-26 | -mapcs-float | -mapcs-reentrant | -moabi
-EB | -EL
-mthumb-interwork
-k
See the info pages for documentation of the CRIS-specific options.
The following options are available when as is configured for a D10V processor.
-O
The following options are available when as is configured for a D30V processor.
-O
-n
-N
The following options are available when as is configured for the Intel 80960 processor.
-ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC
-b
-no-relax
The following options are available when as is configured for the Mitsubishi M32R series.
--m32rx
--warn-explicit-parallel-conflicts or --Wp
--no-warn-explicit-parallel-conflicts or --Wnp
The following options are available when as is configured for the Motorola 68000 series.
-l
-m68000 | -m68008 | -m68010 | -m68020 | -m68030
| -m68040 | -m68060 | -m68302 | -m68331 | -m68332
| -m68333 | -m68340 | -mcpu32 | -m5200
-m68881 | -m68882 | -mno-68881 | -mno-68882
-m68851 | -mno-68851
For details about the PDP-11 machine dependent features options, see PDP-11-Options.
-mpic | -mno-pic
-mpic.
-mall
-mall-extensions
-mno-extensions
-mextension | -mno-extension
-mcpu
-mmachine
The following options are available when as is configured for a picoJava processor.
-mb
-ml
The following options are available when as is configured for the Motorola 68HC11 or 68HC12 series.
-m68hc11 | -m68hc12
--force-long-branchs
-S | --short-branchs
--strict-direct-mode
--print-insn-syntax
--print-opcodes
--generate-example
as.
The following options are available when as is configured
for the SPARC architecture:
-Av6 | -Av7 | -Av8 | -Asparclet | -Asparclite
-Av8plus | -Av8plusa | -Av9 | -Av9a
-Av8plus and -Av8plusa select a 32 bit environment.
-Av9 and -Av9a select a 64 bit environment.
-Av8plusa and -Av9a enable the SPARC V9 instruction set with
UltraSPARC extensions.
-xarch=v8plus | -xarch=v8plusa
-bump
The following options are available when as is configured for a MIPS processor.
-G num
gp register. It is only accepted for targets that
use ECOFF format, such as a DECstation running Ultrix. The default value is 8.
-EB
-EL
-mips1
-mips2
-mips3
-mips4
-mips32
-mips64
-mips1 corresponds to the R2000 and R3000 processors,
-mips2 to the R6000 processor, and -mips3 to the R4000
processor.
-mips5, -mips32, and -mips64 correspond
to generic MIPS V, MIPS32, and MIPS64 ISA
processors, respectively.
-m4650
-no-m4650
mad and madu instruction, and to not schedule nop
instructions around accesses to the HI and LO registers.
-no-m4650 turns off this option.
-mcpu=CPU
-mcpu, except that there are more value of cpu
understood.
--emulation=name
as to emulate as configured
for some other target, in all respects, including output format (choosing
between ELF and ECOFF only), handling of pseudo-opcodes which may generate
debugging information or store symbol table information, and default
endianness. The available configuration names are: mipsecoff,
mipself, mipslecoff, mipsbecoff, mipslelf,
mipsbelf. The first two do not alter the default endianness from that
of the primary target for which the assembler was configured; the others change
the default to little- or big-endian as indicated by the b or l
in the name. Using -EB or -EL will override the endianness
selection in any case.
This option is currently supported only when the primary target
as is configured for is a MIPS ELF or ECOFF target.
Furthermore, the primary target or others specified with
--enable-targets=... at configuration time must include support for
the other format, if both are to be available. For example, the Irix 5
configuration includes support for both.
Eventually, this option will support more configurations, with more
fine-grained control over the assembler's behavior, and will be supported for
more processors.
-nocpp
as ignores this option. It is accepted for compatibility with
the native tools.
--trap
--no-trap
--break
--no-break
--trap or --no-break (which are synonyms) take a trap exception
(and only work for Instruction Set Architecture level 2 and higher);
--break or --no-trap (also synonyms, and the default) take a
break exception.
-n
as will issue a warning every
time it generates a nop instruction from a macro.
The following options are available when as is configured for an MCore processor.
-jsri2bsr
-nojsri2bsr
-nojsri2bsr can be used to disable it.
-sifilter
-nosifilter
-sifilter command line option.
-relax
-mcpu=[210|340]
-EB
-EL
See the info pages for documentation of the MMIX-specific options.
This manual is intended to describe what you need to know to use
GNU as. We cover the syntax expected in source files, including
notation for symbols, constants, and expressions; the directives that
as understands; and of course how to invoke as.
This manual also describes some of the machine-dependent features of various flavors of the assembler.
On the other hand, this manual is not intended as an introduction to programming in assembly language--let alone programming in general! In a similar vein, we make no attempt to introduce the machine architecture; we do not describe the instruction set, standard mnemonics, registers or addressing modes that are standard to a particular architecture. You may want to consult the manufacturer's machine architecture manual for this information.
GNU as is really a family of assemblers.
If you use (or have used) the GNU assembler on one architecture, you
should find a fairly similar environment when you use it on another
architecture. Each version has much in common with the others,
including object file formats, most assembler directives (often called
pseudo-ops) and assembler syntax.
as is primarily intended to assemble the output of the
GNU C compiler gcc for use by the linker
ld. Nevertheless, we've tried to make as
assemble correctly everything that other assemblers for the same
machine would assemble.
Any exceptions are documented explicitly (see Machine Dependencies).
This doesn't mean as always uses the same syntax as another
assembler for the same architecture; for example, we know of several
incompatible versions of 680x0 assembly language syntax.
Unlike older assemblers, as is designed to assemble a source
program in one pass of the source file. This has a subtle impact on the
.org directive (see .org).
The GNU assembler can be configured to produce several alternative object file formats. For the most part, this does not affect how you write assembly language programs; but directives for debugging symbols are typically different in different file formats. See Symbol Attributes.
After the program name as, the command line may contain
options and file names. Options may appear in any order, and may be
before, after, or between file names. The order of file names is
significant.
-- (two hyphens) by itself names the standard input file
explicitly, as one of the files for as to assemble.
Except for -- any command line argument that begins with a
hyphen (-) is an option. Each option changes the behavior of
as. No option changes the way another option works. An
option is a - followed by one or more letters; the case of
the letter is important. All options are optional.
Some options expect exactly one file name to follow them. The file
name may either immediately follow the option's letter (compatible
with older assemblers) or it may be the next command argument (GNU
standard). These two command lines are equivalent:
as -o my-object-file.o mumble.s as -omy-object-file.o mumble.s
We use the phrase source program, abbreviated source, to
describe the program input to one run of as. The program may
be in one or more files; how the source is partitioned into files
doesn't change the meaning of the source.
The source program is a concatenation of the text in all the files, in the order specified.
Each time you run as it assembles exactly one source
program. The source program is made up of one or more files.
(The standard input is also a file.)
You give as a command line that has zero or more input file
names. The input files are read (from left file name to right). A
command line argument (in any position) that has no special meaning
is taken to be an input file name.
If you give as no file names it attempts to read one input file
from the as standard input, which is normally your terminal. You
may have to type <ctl-D> to tell as there is no more program
to assemble.
Use -- if you need to explicitly name the standard input file
in your command line.
If the source is empty, as produces a small, empty object
file.
There are two ways of locating a line in the input file (or files) and either may be used in reporting error messages. One way refers to a line number in a physical file; the other refers to a line number in a "logical" file. See Error and Warning Messages.
Physical files are those files named in the command line given
to as.
Logical files are simply names declared explicitly by assembler
directives; they bear no relation to physical files. Logical file names help
error messages reflect the original source file, when as source
is itself synthesized from other files. as understands the
# directives emitted by the gcc preprocessor. See also
.file.
Every time you run as it produces an output file, which is
your assembly language program translated into numbers. This file
is the object file. Its default name is
a.out, or
b.out when as is configured for the Intel 80960.
You can give it another name by using the -o option. Conventionally,
object file names end with .o. The default name is used for historical
reasons: older assemblers were capable of assembling self-contained programs
directly into a runnable program. (For some formats, this isn't currently
possible, but it can be done for the a.out format.)
The object file is meant for input to the linker ld. It contains
assembled program code, information to help ld integrate
the assembled program into a runnable file, and (optionally) symbolic
information for the debugger.
as may write warnings and error messages to the standard error
file (usually your terminal). This should not happen when a compiler
runs as automatically. Warnings report an assumption made so
that as could keep assembling a flawed program; errors report a
grave problem that stops the assembly.
Warning messages have the format
file_name:NNN:Warning Message Text
(where NNN is a line number). If a logical file name has been given
(see .file) it is used for the filename, otherwise the name of
the current input file is used. If a logical line number was given
(see .line)
then it is used to calculate the number printed,
otherwise the actual line in the current source file is printed. The
message text is intended to be self explanatory (in the grand Unix
tradition).
Error messages have the format
file_name:NNN:FATAL:Error Message TextThe file name and line number are derived as for warning messages. The actual message text may be rather less explanatory because many of them aren't supposed to happen.
This chapter describes command-line options available in all versions of the GNU assembler; see Machine Dependencies, for options specific to particular machine architectures.
If you are invoking as via the GNU C compiler (version 2),
you can use the -Wa option to pass arguments through to the assembler.
The assembler arguments must be separated from each other (and the -Wa)
by commas. For example:
gcc -c -g -O -Wa,-alh,-L file.c
This passes two options to the assembler: -alh (emit a listing to
standard output with with high-level and assembly source) and -L (retain
local symbols in the symbol table).
Usually you do not need to use this -Wa mechanism, since many compiler
command-line options are automatically passed to the assembler by the compiler.
(You can call the GNU compiler driver with the -v option to see
precisely what options it passes to each compilation pass, including the
assembler.)
-a[cdhlns]These options enable listing output from the assembler. By itself,
-a requests high-level, assembly, and symbols listing.
You can use other letters to select specific options for the list:
-ah requests a high-level language listing,
-al requests an output-program assembly listing, and
-as requests a symbol table listing.
High-level listings require that a compiler debugging option like
-g be used, and that assembly listings (-al) be requested
also.
Use the -ac option to omit false conditionals from a listing. Any lines
which are not assembled because of a false .if (or .ifdef, or any
other conditional), or a true .if followed by an .else, will be
omitted from the listing.
Use the -ad option to omit debugging directives from the
listing.
Once you have specified one of these options, you can further control
listing output and its appearance using the directives .list,
.nolist, .psize, .eject, .title, and
.sbttl.
The -an option turns off all forms processing.
If you do not request listing output with one of the -a options, the
listing-control directives have no effect.
The letters after -a may be combined into one option,
e.g., -aln.
Note if the assembler source is coming from the standard input (eg because it
is being created by gcc and the -pipe command line switch
is being used) then the listing will not contain any comments or preprocessor
directives. This is because the listing code buffers input source lines from
stdin only after they have been preprocessed by the assembler. This reduces
memory usage and makes the code more efficient.
-DThis option has no effect whatsoever, but it is accepted to make it more
likely that scripts written for other assemblers also work with
as.
-f-f should only be used when assembling programs written by a
(trusted) compiler. -f stops the assembler from doing whitespace
and comment preprocessing on
the input file(s) before assembling them. See Preprocessing.
Warning: if you use-fwhen the files actually need to be preprocessed (if they contain comments, for example),asdoes not work correctly.
.include search path: -I pathUse this option to add a path to the list of directories
as searches for files specified in .include
directives (see .include). You may use -I as
many times as necessary to include a variety of paths. The current
working directory is always searched first; after that, as
searches any -I directories in the same order as they were
specified (left to right) on the command line.
-Kas sometimes alters the code emitted for directives of the form
.word sym1-sym2; see .word.
You can use the -K option if you want a warning issued when this
is done.
-LLabels beginning with L (upper case only) are called local
labels. See Symbol Names. Normally you do not see such labels when
debugging, because they are intended for the use of programs (like
compilers) that compose assembler programs, not for your notice.
Normally both as and ld discard such labels, so you do not
normally debug with them.
This option tells as to retain those L... symbols
in the object file. Usually if you do this you also tell the linker
ld to preserve symbols whose names begin with L.
By default, a local label is any label beginning with L, but each
target is allowed to redefine the local label prefix.
On the HPPA local labels begin with L$.
--listingThe listing feature of the assembler can be enabled via the command line switch
-a (see a). This feature combines the input source file(s) with a
hex dump of the corresponding locations in the output object file, and displays
them as a listing file. The format of this listing can be controlled by pseudo
ops inside the assembler source (see List see Title see Sbttl
see Psize see Eject) and also by the following switches:
--listing-lhs-width=number
--listing-lhs-width2=number
--listing-lhs-width. If neither
switch is used the default is to one.
--listing-rhs-width=number
--listing-cont-lines=number
-MThe -M or --mri option selects MRI compatibility mode. This
changes the syntax and pseudo-op handling of as to make it
compatible with the ASM68K or the ASM960 (depending upon the
configured target) assembler from Microtec Research. The exact nature of the
MRI syntax will not be documented here; see the MRI manuals for more
information. Note in particular that the handling of macros and macro
arguments is somewhat different. The purpose of this option is to permit
assembling existing MRI assembler code using as.
The MRI compatibility is not complete. Certain operations of the MRI assembler depend upon its object file format, and can not be supported using other object file formats. Supporting these would require enhancing each object file format individually. These are:
The m68k MRI assembler supports common sections which are merged by the linker.
Other object file formats do not support this. as handles
common sections by treating them as a single common symbol. It permits local
symbols to be defined within a common section, but it can not support global
symbols, since it has no way to describe them.
The MRI assemblers support relocations against a negated section address, and relocations which combine the start addresses of two or more sections. These are not support by other object file formats.
END pseudo-op specifying start address
The MRI END pseudo-op permits the specification of a start address.
This is not supported by other object file formats. The start address may
instead be specified using the -e option to the linker, or in a linker
script.
IDNT, .ident and NAME pseudo-ops
The MRI IDNT, .ident and NAME pseudo-ops assign a module
name to the output file. This is not supported by other object file formats.
ORG pseudo-op
The m68k MRI ORG pseudo-op begins an absolute section at a given
address. This differs from the usual as .org pseudo-op,
which changes the location within the current section. Absolute sections are
not supported by other object file formats. The address of a section may be
assigned within a linker script.
There are some other features of the MRI assembler which are not supported by
as, typically either because they are difficult or because they
seem of little consequence. Some of these may be supported in future releases.
EBCDIC strings are not supported.
Packed binary coded decimal is not supported. This means that the DC.P
and DCB.P pseudo-ops are not supported.
FEQU pseudo-op
The m68k FEQU pseudo-op is not supported.
NOOBJ pseudo-op
The m68k NOOBJ pseudo-op is not supported.
OPT branch control options
The m68k OPT branch control options--B, BRS, BRB,
BRL, and BRW--are ignored. as automatically
relaxes all branches, whether forward or backward, to an appropriate size, so
these options serve no purpose.
OPT list control options
The following m68k OPT list control options are ignored: C,
CEX, CL, CRE, E, G, I, M,
MEX, MC, MD, X.
OPT options
The following m68k OPT options are ignored: NEST, O,
OLD, OP, P, PCO, PCR, PCS, R.
OPT D option is default
The m68k OPT D option is the default, unlike the MRI assembler.
OPT NOD may be used to turn it off.
XREF pseudo-op.
The m68k XREF pseudo-op is ignored.
.debug pseudo-op
The i960 .debug pseudo-op is not supported.
.extended pseudo-op
The i960 .extended pseudo-op is not supported.
.list pseudo-op.
The various options of the i960 .list pseudo-op are not supported.
.optimize pseudo-op
The i960 .optimize pseudo-op is not supported.
.output pseudo-op
The i960 .output pseudo-op is not supported.
.setreal pseudo-op
The i960 .setreal pseudo-op is not supported.
--MDas can generate a dependency file for the file it creates. This
file consists of a single rule suitable for make describing the
dependencies of the main source file.
The rule is written to the file named in its argument.
This feature is used in the automatic updating of makefiles.
-oThere is always one object file output when you run as. By
default it has the name
a.out (or b.out, for Intel 960 targets only).
You use this option (which takes exactly one filename) to give the
object file a different name.
Whatever the object file is called, as overwrites any
existing file of the same name.
-R-R tells as to write the object file as if all
data-section data lives in the text section. This is only done at
the very last moment: your binary data are the same, but data
section parts are relocated differently. The data section part of
your object file is zero bytes long because all its bytes are
appended to the text section. (See Sections and Relocation.)
When you specify -R it would be possible to generate shorter
address displacements (because we do not have to cross between text and
data section). We refrain from doing this simply for compatibility with
older versions of as. In future, -R may work this way.
When as is configured for COFF output,
this option is only useful if you use sections named .text and
.data.
-R is not supported for any of the HPPA targets. Using
-R generates a warning from as.
--statisticsUse --statistics to display two statistics about the resources used by
as: the maximum amount of space allocated during the assembly
(in bytes), and the total execution time taken for the assembly (in CPU
seconds).
--traditional-formatFor some targets, the output of as is different in some ways
from the output of some existing assembler. This switch requests
as to use the traditional format instead.
For example, it disables the exception frame optimizations which
as normally does by default on gcc output.
-vYou can find out what version of as is running by including the
option -v (which you can also spell as -version) on the
command line.
-W, --warn, --no-warn, --fatal-warningsas should never give a warning or error message when
assembling compiler output. But programs written by people often
cause as to give a warning that a particular assumption was
made. All such warnings are directed to the standard error file.
If you use the -W and --no-warn options, no warnings are issued.
This only affects the warning messages: it does not change any particular of
how as assembles your file. Errors, which stop the assembly,
are still reported.
If you use the --fatal-warnings option, as considers
files that generate warnings to be in error.
You can switch these options off again by specifying --warn, which
causes warnings to be output as usual.
-ZAfter an error message, as normally produces no output. If for
some reason you are interested in object file output even after
as gives an error message on your program, use the -Z
option. If there are any errors, as continues anyways, and
writes an object file after a final warning message of the form n
errors, m warnings, generating bad object file.
This chapter describes the machine-independent syntax allowed in a
source file. as syntax is similar to what many other
assemblers use; it is inspired by the BSD 4.2
assembler, except that as does not assemble Vax bit-fields.
The as internal preprocessor:
It does not do macro processing, include file handling, or
anything else you may get from your C compiler's preprocessor. You can
do include file processing with the .include directive
(see .include). You can use the GNU C compiler driver
to get other "CPP" style preprocessing, by giving the input file a
.S suffix. See Options Controlling the Kind of Output.
Excess whitespace, comments, and character constants cannot be used in the portions of the input text that are not preprocessed.
If the first line of an input file is #NO_APP or if you use the
-f option, whitespace and comments are not removed from the input file.
Within an input file, you can ask for whitespace and comment removal in
specific portions of the by putting a line that says #APP before the
text that may contain whitespace or comments, and putting a line that says
#NO_APP after this text. This feature is mainly intend to support
asm statements in compilers whose output is otherwise free of comments
and whitespace.
Whitespace is one or more blanks or tabs, in any order. Whitespace is used to separate symbols, and to make programs neater for people to read. Unless within character constants (see Character Constants), any whitespace means the same as exactly one space.
There are two ways of rendering comments to as. In both
cases the comment is equivalent to one space.
Anything from /* through the next */ is a comment.
This means you may not nest these comments.
/*
The only way to include a newline ('\n') in a comment
is to use this sort of comment.
*/
/* This sort of comment does not nest. */
Anything from the line comment character to the next newline
is considered a comment and is ignored. The line comment character is
; for the AMD 29K family;
; on the ARC;
@ on the ARM;
; for the H8/300 family;
! for the H8/500 family;
; for the HPPA;
# on the i386 and x86-64;
# on the i960;
; for the PDP-11;
; for picoJava;
; for Motorola PowerPC;
! for the Hitachi SH;
! on the SPARC;
# on the m32r;
| on the 680x0;
# on the 68HC11 and 68HC12;
; on the M880x0;
# on the Vax;
! for the Z8000;
# on the V850;
see Machine Dependencies.
On some machines there are two different line comment characters. One character only begins a comment if it is the first non-whitespace character on a line, while the other always begins a comment.
The V850 assembler also supports a double dash as starting a comment that extends to the end of the line.
--;
To be compatible with past assemblers, lines that begin with # have a
special interpretation. Following the # should be an absolute
expression (see Expressions): the logical line number of the next
line. Then a string (see Strings) is allowed: if present it is a
new logical file name. The rest of the line, if any, should be whitespace.
If the first non-whitespace characters on the line are not numeric,
the line is ignored. (Just like a comment.)
# This is an ordinary comment.
# 42-6 "new_file_name" # New logical file name
# This is logical line # 36.
This feature is deprecated, and may disappear from future versions
of as.
A symbol is one or more characters chosen from the set of all
letters (both upper and lower case), digits and the three characters
_.$.
On most machines, you can also use $ in symbol names; exceptions
are noted in Machine Dependencies.
No symbol may begin with a digit. Case is significant.
There is no length limit: all characters are significant. Symbols are
delimited by characters not in that set, or by the beginning of a file
(since the source program must end with a newline, the end of a file is
not a possible symbol delimiter). See Symbols.
A statement ends at a newline character (\n) or line
separator character. (The line separator is usually ;, unless
this conflicts with the comment character; see Machine Dependencies.) The
newline or separator character is considered part of the preceding
statement. Newlines and separators within character constants are an
exception: they do not end statements.
It is an error to end any statement with end-of-file: the last character of any input file should be a newline.
An empty statement is allowed, and may include whitespace. It is ignored.
A statement begins with zero or more labels, optionally followed by a
key symbol which determines what kind of statement it is. The key
symbol determines the syntax of the rest of the statement. If the
symbol begins with a dot . then the statement is an assembler
directive: typically valid for any computer. If the symbol begins with
a letter the statement is an assembly language instruction: it
assembles into a machine language instruction.
Different versions of as for different computers
recognize different instructions. In fact, the same symbol may
represent a different instruction in a different computer's assembly
language.
A label is a symbol immediately followed by a colon (:).
Whitespace before a label or after a colon is permitted, but you may not
have whitespace between a label's symbol and its colon. See Labels.
For HPPA targets, labels need not be immediately followed by a colon, but
the definition of a label must begin in column zero. This also implies that
only one label may be defined on each line.
label: .directive followed by something
another_label: # This is an empty statement.
instruction operand_1, operand_2, ...
A constant is a number, written so that its value is known by
inspection, without knowing any context. Like this:
.byte 74, 0112, 092, 0x4A, 0X4a, 'J, '\J # All the same value. .ascii "Ring the bell\7" # A string constant. .octa 0x123456789abcdef0123456789ABCDEF0 # A bignum. .float 0f-314159265358979323846264338327\ 95028841971.693993751E-40 # - pi, a flonum.
There are two kinds of character constants. A character stands for one character in one byte and its value may be used in numeric expressions. String constants (properly called string literals) are potentially many bytes and their values may not be used in arithmetic expressions.
A string is written between double-quotes. It may contain
double-quotes or null characters. The way to get special characters
into a string is to escape these characters: precede them with
a backslash \ character. For example \\ represents
one backslash: the first \ is an escape which tells
as to interpret the second character literally as a backslash
(which prevents as from recognizing the second \ as an
escape character). The complete list of escapes follows.
\008 has the value 010, and \009 the value 011.
x hex-digits...
x works.
\ character.
" character. Needed in strings to represent
this character, because an unescaped " would end the string.
\ was not present. The idea is that if
you used an escape sequence you clearly didn't want the literal
interpretation of the following character. However as has no
other interpretation, so as knows it is giving you the wrong
code and warns you of the fact.
Which characters are escapable, and what those escapes represent, varies widely among assemblers. The current set is what we think the BSD 4.2 assembler recognizes, and is a subset of what most C compilers recognize. If you are in doubt, do not use an escape sequence.
A single character may be written as a single quote immediately
followed by that character. The same escapes apply to characters as
to strings. So if you want to write the character backslash, you
must write '\\ where the first \ escapes the second
\. As you can see, the quote is an acute accent, not a
grave accent. A newline
immediately following an acute accent is taken as a literal character
and does not count as the end of a statement. The value of a character
constant in a numeric expression is the machine's byte-wide code for
that character. as assumes your character code is ASCII:
'A means 65, 'B means 66, and so on.
as distinguishes three kinds of numbers according to how they
are stored in the target machine. Integers are numbers that
would fit into an int in the C language. Bignums are
integers, but they are stored in more than 32 bits. Flonums
are floating point numbers, described below.
A binary integer is 0b or 0B followed by zero or more of
the binary digits 01.
An octal integer is 0 followed by zero or more of the octal
digits (01234567).
A decimal integer starts with a non-zero digit followed by zero or
more digits (0123456789).
A hexadecimal integer is 0x or 0X followed by one or
more hexadecimal digits chosen from 0123456789abcdefABCDEF.
Integers have the usual values. To denote a negative integer, use
the prefix operator - discussed under expressions
(see Prefix Operators).
A bignum has the same syntax and semantics as an integer except that the number (or its negative) takes more than 32 bits to represent in binary. The distinction is made because in some places integers are permitted while bignums are not.
A flonum represents a floating point number. The translation is
indirect: a decimal floating point number from the text is converted by
as to a generic binary floating point number of more than
sufficient precision. This generic floating point number is converted
to a particular computer's floating point format (or formats) by a
portion of as specialized to that computer.
A flonum is written by writing (in order)
0.
(0 is optional on the HPPA.)
as the rest of the number is a flonum.
e is recommended. Case is not important.
On the H8/300, H8/500,
Hitachi SH,
and AMD 29K architectures, the letter must be
one of the letters DFPRSX (in upper or lower case).
On the ARC, the letter must be one of the letters DFRS
(in upper or lower case).
On the Intel 960 architecture, the letter must be
one of the letters DFT (in upper or lower case).
On the HPPA architecture, the letter must be E (upper case only).
+ or -.
. followed by zero
or more decimal digits.
E or e.
+ or -.
At least one of the integer part or the fractional part must be present. The floating point number has the usual base-10 value.
as does all processing using integers. Flonums are computed
independently of any floating point hardware in the computer running
as.
Roughly, a section is a range of addresses, with no gaps; all data "in" those addresses is treated the same for some particular purpose. For example there may be a "read only" section.
The linker ld reads many object files (partial programs) and
combines their contents to form a runnable program. When as
emits an object file, the partial program is assumed to start at address 0.
ld assigns the final addresses for the partial program, so that
different partial programs do not overlap. This is actually an
oversimplification, but it suffices to explain how as uses
sections.
ld moves blocks of bytes of your program to their run-time
addresses. These blocks slide to their run-time addresses as rigid
units; their length does not change and neither does the order of bytes
within them. Such a rigid unit is called a section. Assigning
run-time addresses to sections is called relocation. It includes
the task of adjusting mentions of object-file addresses so they refer to
the proper run-time addresses.
For the H8/300 and H8/500,
and for the Hitachi SH,
as pads sections if needed to
ensure they end on a word (sixteen bit) boundary.
An object file written by as has at least three sections, any
of which may be empty. These are named text, data and
bss sections.
When it generates COFF output,
as can also generate whatever other named sections you specify
using the .section directive (see .section).
If you do not use any directives that place output in the .text
or .data sections, these sections still exist, but are empty.
When as generates SOM or ELF output for the HPPA,
as can also generate whatever other named sections you
specify using the .space and .subspace directives. See
HP9000 Series 800 Assembly Language Reference Manual
(HP 92432-90001) for details on the .space and .subspace
assembler directives.
Additionally, as uses different names for the standard
text, data, and bss sections when generating SOM output. Program text
is placed into the $CODE$ section, data into $DATA$, and
BSS into $BSS$.
Within the object file, the text section starts at address 0, the
data section follows, and the bss section follows the data section.
When generating either SOM or ELF output files on the HPPA, the text
section starts at address 0, the data section at address
0x4000000, and the bss section follows the data section.
To let ld know which data changes when the sections are
relocated, and how to change that data, as also writes to the
object file details of the relocation needed. To perform relocation
ld must know, each time an address in the object
file is mentioned:
(address) - (start-address of section)?
In fact, every address as ever uses is expressed as
(section) + (offset into section)
Further, most expressions as computes have this section-relative
nature.
(For some object formats, such as SOM for the HPPA, some expressions are
symbol-relative instead.)
In this manual we use the notation {secname N} to mean "offset N into section secname."
Apart from text, data and bss sections you need to know about the
absolute section. When ld mixes partial programs,
addresses in the absolute section remain unchanged. For example, address
{absolute 0} is "relocated" to run-time address 0 by
ld. Although the linker never arranges two partial programs'
data sections with overlapping addresses after linking, by definition
their absolute sections must overlap. Address {absolute 239} in one
part of a program is always the same address when the program is running as
address {absolute 239} in any other part of the program.
The idea of sections is extended to the undefined section. Any address whose section is unknown at assembly time is by definition rendered {undefined U}--where U is filled in later. Since numbers are always defined, the only way to generate an undefined address is to mention an undefined symbol. A reference to a named common block would be such a symbol: its value is unknown at assembly time so it has section undefined.
By analogy the word section is used to describe groups of sections in
the linked program. ld puts all partial programs' text
sections in contiguous addresses in the linked program. It is
customary to refer to the text section of a program, meaning all
the addresses of all partial programs' text sections. Likewise for
data and bss sections.
Some sections are manipulated by ld; others are invented for
use of as and have no meaning except during assembly.
ld deals with just four kinds of sections, summarized below.
as and ld treat them as
separate but equal sections. Anything you can say of one section is
true another.
When the program is running, however, it is
customary for the text section to be unalterable. The
text section is often shared among processes: it contains
instructions, constants and the like. The data section of a running
program is usually alterable: for example, C variables would be stored
in the data section.
ld must
not change when relocating. In this sense we speak of absolute
addresses being "unrelocatable": they do not change during relocation.
An idealized example of three relocatable sections follows.
The example uses the traditional section names .text and .data.
Memory addresses are on the horizontal axis.
These sections are meant only for the internal use of as. They
have no meaning at run-time. You do not really need to know about these
sections for most purposes; but they can be mentioned in as
warning messages, so it might be helpful to have an idea of their
meanings to as. These sections are used to permit the
value of every expression in your assembly language program to be a
section-relative address.
Assembled bytes
conventionally
fall into two sections: text and data.
You may have separate groups of
data in named sections
that you want to end up near to each other in the object file, even though they
are not contiguous in the assembler source. as allows you to
use subsections for this purpose. Within each section, there can be
numbered subsections with values from 0 to 8192. Objects assembled into the
same subsection go into the object file together with other objects in the same
subsection. For example, a compiler might want to store constants in the text
section, but might not want to have them interspersed with the program being
assembled. In this case, the compiler could issue a .text 0 before each
section of code being output, and a .text 1 before each group of
constants being output.
Subsections are optional. If you do not use subsections, everything goes in subsection number zero.
Each subsection is zero-padded up to a multiple of four bytes.
(Subsections may be padded a different amount on different flavors
of as.)
Subsections appear in your object file in numeric order, lowest numbered
to highest. (All this to be compatible with other people's assemblers.)
The object file contains no representation of subsections; ld and
other programs that manipulate object files see no trace of them.
They just see all your text subsections as a text section, and all your
data subsections as a data section.
To specify which subsection you want subsequent statements assembled
into, use a numeric argument to specify it, in a .text
expression or a .data expression statement.
When generating COFF output, you
can also use an extra subsection
argument with arbitrary named sections: .section name,
expression.
Expression should be an absolute expression.
(See Expressions.) If you just say .text then .text 0
is assumed. Likewise .data means .data 0. Assembly
begins in text 0. For instance:
.text 0 # The default subsection is text 0 anyway. .ascii "This lives in the first text subsection. *" .text 1 .ascii "But this lives in the second text subsection." .data 0 .ascii "This lives in the data section," .ascii "in the first data subsection." .text 0 .ascii "This lives in the first text section," .ascii "immediately following the asterisk (*)."
Each section has a location counter incremented by one for every byte
assembled into that section. Because subsections are merely a convenience
restricted to as there is no concept of a subsection location
counter. There is no way to directly manipulate a location counter--but the
.align directive changes it, and any label definition captures its
current value. The location counter of the section where statements are being
assembled is said to be the active location counter.
The bss section is used for local common variable storage. You may allocate address space in the bss section, but you may not dictate data to load into it before your program executes. When your program starts running, all the contents of the bss section are zeroed bytes.
The .lcomm pseudo-op defines a symbol in the bss section; see
.lcomm.
The .comm pseudo-op may be used to declare a common symbol, which is
another form of uninitialized symbol; see See .comm.
When assembling for a target which supports multiple sections, such as ELF or
COFF, you may switch into the .bss section and define symbols as usual;
see .section. You may only assemble zero values into the
section. Typically the section will only contain symbol definitions and
.skip directives (see .skip).
Symbols are a central concept: the programmer uses symbols to name things, the linker uses symbols to link, and the debugger uses symbols to debug.
Warning: as does not place symbols in the object file in
the same order they were declared. This may break some debuggers.
A label is written as a symbol immediately followed by a colon
:. The symbol then represents the current value of the
active location counter, and is, for example, a suitable instruction
operand. You are warned if you use the same symbol to represent two
different locations: the first definition overrides any other
definitions.
On the HPPA, the usual form for a label need not be immediately followed by a
colon, but instead must start in column zero. Only one label may be defined on
a single line. To work around this, the HPPA version of as also
provides a special directive .label for defining labels more flexibly.
A symbol can be given an arbitrary value by writing a symbol, followed
by an equals sign =, followed by an expression
(see Expressions). This is equivalent to using the .set
directive. See .set.
Symbol names begin with a letter or with one of ._. On most
machines, you can also use $ in symbol names; exceptions are
noted in Machine Dependencies. That character may be followed by any
string of digits, letters, dollar signs (unless otherwise noted in
Machine Dependencies), and underscores.
For the AMD 29K family, ? is also allowed in the
body of a symbol name, though not at its beginning.
Case of letters is significant: foo is a different symbol name
than Foo.
Each symbol has exactly one name. Each name in an assembly language program refers to exactly one symbol. You may use that symbol name any number of times in a program.
Local symbols help compilers and programmers use names temporarily.
They create symbols which are guaranteed to be unique over the entire scope of
the input source code and which can be referred to by a simple notation.
To define a local symbol, write a label of the form N: (where N
represents any positive integer). To refer to the most recent previous
definition of that symbol write Nb, using the same number as when
you defined the label. To refer to the next definition of a local label, write
Nf-- The b stands for"backwards" and the f stands
for "forwards".
There is no restriction on how you can use these labels, and you can reuse them
too. So that it is possible to repeatedly define the same local label (using
the same number N), although you can only refer to the most recently
defined local label of that number (for a backwards reference) or the next
definition of a specific local label for a forward reference. It is also worth
noting that the first 10 local labels (0:...9:) are
implemented in a slightly more efficient manner than the others.
Here is an example:
1: branch 1f 2: branch 1b 1: branch 2f 2: branch 1b
Which is the equivalent of:
label_1: branch label_3 label_2: branch label_1 label_3: branch label_4 label_4: branch label_3
Local symbol names are only a notational device. They are immediately transformed into more conventional symbol names before the assembler uses them. The symbol names stored in the symbol table, appearing in error messages and optionally emitted to the object file. The names are constructed using these parts:
L
L. Normally both as and
ld forget symbols that start with L. These labels are
used for symbols you are never intended to see. If you use the
-L option then as retains these symbols in the
object file. If you also instruct ld to retain these symbols,
you may use them in debugging.
number
55: then the number is 55.
C-B
\002 (control-B).
ordinal number
0: gets the number 1. The 15th definition of 0: gets the
number 15, and so on. Likewise the first definition of 1: gets
the number 1 and its 15th defintion gets 15 as well.
So for example, the first 1: is named L1C-B1, the 44th
3: is named L3C-B44.
as also supports an even more local form of local labels called
dollar labels. These labels go out of scope (ie they become undefined) as soon
as a non-local label is defined. Thus they remain valid for only a small
region of the input source code. Normal local labels, by contrast, remain in
scope for the entire file, or until they are redefined by another occurrence of
the same local label.
Dollar labels are defined in exactly the same way as ordinary local labels,
except that instead of being terminated by a colon, they are terminated by a
dollar sign. eg 55$.
They can also be distinguished from ordinary local labels by their transformed
name which uses ASCII character \001 (control-A) as the magic character
to distinguish them from ordinary labels. Thus the 5th defintion of 6$
is named L6C-A5.
The special symbol . refers to the current address that
as is assembling into. Thus, the expression melvin:
.long . defines melvin to contain its own address.
Assigning a value to . is treated the same as a .org
directive. Thus, the expression .=.+4 is the same as saying
.space 4.
Every symbol has, as well as its name, the attributes "Value" and "Type". Depending on output format, symbols can also have auxiliary attributes.
If you use a symbol without defining it, as assumes zero for
all these attributes, and probably won't warn you. This makes the
symbol an externally defined symbol, which is generally what you
would want.
a.out
The value of a symbol is (usually) 32 bits. For a symbol which labels a
location in the text, data, bss or absolute sections the value is the
number of addresses from the start of that section to the label.
Naturally for text, data and bss sections the value of a symbol changes
as ld changes section base addresses during linking. Absolute
symbols' values do not change during linking: that is why they are
called absolute.
The value of an undefined symbol is treated in a special way. If it is
0 then the symbol is not defined in this assembler source file, and
ld tries to determine its value from other files linked into the
same program. You make this kind of symbol simply by mentioning a symbol
name without defining it. A non-zero value represents a .comm
common declaration. The value is how much common storage to reserve, in
bytes (addresses). The symbol refers to the first address of the
allocated storage.
The type attribute of a symbol contains relocation (section) information, any flag settings indicating that a symbol is external, and (optionally), other information for linkers and debuggers. The exact format depends on the object-code output format in use.
a.outThis is an arbitrary 16-bit value. You may establish a symbol's
descriptor value by using a .desc statement
(see .desc). A descriptor value means nothing to
as.
This is an arbitrary 8-bit value. It means nothing to as.
The COFF format supports a multitude of auxiliary symbol attributes;
like the primary symbol attributes, they are set between .def and
.endef directives.
The symbol name is set with .def; the value and type,
respectively, with .val and .type.
The as directives .dim, .line, .scl,
.size, and .tag can generate auxiliary symbol table
information for COFF.
The SOM format for the HPPA supports a multitude of symbol attributes set with
the .EXPORT and .IMPORT directives.
The attributes are described in HP9000 Series 800 Assembly
Language Reference Manual (HP 92432-90001) under the IMPORT and
EXPORT assembler directive documentation.
An expression specifies an address or numeric value. Whitespace may precede and/or follow an expression.
The result of an expression must be an absolute number, or else an offset into
a particular section. If an expression is not absolute, and there is not
enough information when as sees the expression to know its
section, a second pass over the source program might be necessary to interpret
the expression--but the second pass is currently not implemented.
as aborts with an error message in this situation.
An empty expression has no value: it is just whitespace or null.
Wherever an absolute expression is required, you may omit the
expression, and as assumes a value of (absolute) 0. This
is compatible with other assemblers.
An integer expression is one or more arguments delimited by operators.
Arguments are symbols, numbers or subexpressions. In other contexts arguments are sometimes called "arithmetic operands". In this manual, to avoid confusing them with the "instruction operands" of the machine language, we use the term "argument" to refer to parts of expressions only, reserving the word "operand" to refer only to machine instruction operands.
Symbols are evaluated to yield {section NNN} where section is one of text, data, bss, absolute, or undefined. NNN is a signed, 2's complement 32 bit integer.
Numbers are usually integers.
A number can be a flonum or bignum. In this case, you are warned
that only the low order 32 bits are used, and as pretends
these 32 bits are an integer. You may write integer-manipulating
instructions that act on exotic constants, compatible with other
assemblers.
Subexpressions are a left parenthesis ( followed by an integer
expression, followed by a right parenthesis ); or a prefix
operator followed by an argument.
Operators are arithmetic functions, like + or %. Prefix
operators are followed by an argument. Infix operators appear
between their arguments. Operators may be preceded and/or followed by
whitespace.
as has the following prefix operators. They each take
one argument, which must be absolute.
-
~
Infix operators take two arguments, one on either side. Operators
have precedence, but operations with equal precedence are performed left
to right. Apart from + or -, both arguments must be
absolute, and the result is absolute.
*
/
/
%
<
<<
<<.
>
>>
>>.
|
&
^
!
+
-
==
<>
<
>
>=
<=
The comparison operators can be used as infix operators. A true results has a value of -1 whereas a false result has a value of 0. Note, these operators perform signed comparisons.
&&
||
These two logical operations can be used to combine the results of sub expressions. Note, unlike the comparison operators a true result returns a value of 1 but a false results does still return 0. Also note that the logical or operator has a slightly lower precedence than logical and.
In short, it's only meaningful to add or subtract the offsets in an address; you can only have a defined section in one of the two arguments.
All assembler directives have names that begin with a period (.).
The rest of the name is letters, usually in lower case.
This chapter discusses directives that are available regardless of the target machine configuration for the GNU assembler. Some machine configurations provide additional directives. See Machine Dependencies.
.abort
.ABORT
.align abs-expr , abs-expr
.ascii "string"...
.asciz "string"...
.balign abs-expr , abs-expr
.byte expressions
.comm symbol , length
.data subsection
.def name
.desc symbol, abs-expression
.dim
.double flonums
.eject
.else
.elseif
.end
.endef
.endfunc
.endif
.equ symbol, expression
.equiv symbol, expression
.err
.exitm
.extern
.fail
.file string
.fill repeat , size , value
.float flonums
.func
.global symbol, .globl symbol
.hidden names
.hword expressions
.ident
.if absolute expression
.incbin "file"[,skip[,count]]
.include "file"
.int expressions
.internal names
.irp symbol,values...
.irpc symbol,values...
.lcomm symbol , length
.lflags
.line line-number
.ln line-number
.linkonce [type]
.list
.long expressions
.macro name args...
.mri val
.nolist
.octa bignums
.org new-lc , fill
.p2align abs-expr , abs-expr
.popsection
.previous
.print string
.protected names
.psize lines, columns
.purgem name
.pushsection name
.quad bignums
.rept count
.sbttl "subheading"
.scl class
.section name, subsection
.set symbol, expression
.short expressions
.single flonums
.size [name , expression]
.skip size , fill
.sleb128 expressions
.space size , fill
.stabd, .stabn, .stabs
.string "str"
.struct expression
.subsection
.symver name,name2@nodename
.tag structname
.text subsection
.title "heading"
.type <int | name , type description>
.uleb128 expressions
.val addr
.version "string"
.vtable_entry table, offset
.vtable_inherit child, parent
.weak names
.word expressions
.abortThis directive stops the assembly immediately. It is for
compatibility with other assemblers. The original idea was that the
assembly language source would be piped into the assembler. If the sender
of the source quit, it could use this directive tells as to
quit also. One day .abort will not be supported.
.ABORTWhen producing COFF output, as accepts this directive as a
synonym for .abort.
When producing b.out output, as accepts this directive,
but ignores it.
.align abs-expr, abs-expr, abs-exprPad the location counter (in the current subsection) to a particular storage boundary. The first expression (which must be absolute) is the alignment required, as described below.
The second expression (also absolute) gives the fill value to be stored in the padding bytes. It (and the comma) may be omitted. If it is omitted, the padding bytes are normally zero. However, on some systems, if the section is marked as containing code and the fill value is omitted, the space is filled with no-op instructions.
The third expression is also absolute, and is also optional. If it is present, it is the maximum number of bytes that should be skipped by this alignment directive. If doing the alignment would require skipping more bytes than the specified maximum, then the alignment is not done at all. You can omit the fill value (the second argument) entirely by simply using two commas after the required alignment; this can be useful if you want the alignment to be filled with no-op instructions when appropriate.
The way the required alignment is specified varies from system to system.
For the a29k, hppa, m68k, m88k, w65, sparc, and Hitachi SH, and i386 using ELF
format,
the first expression is the
alignment request in bytes. For example .align 8 advances
the location counter until it is a multiple of 8. If the location counter
is already a multiple of 8, no change is needed.
For other systems, including the i386 using a.out format, and the arm and
strongarm, it is the
number of low-order zero bits the location counter must have after
advancement. For example .align 3 advances the location
counter until it a multiple of 8. If the location counter is already a
multiple of 8, no change is needed.
This inconsistency is due to the different behaviors of the various
native assemblers for these systems which GAS must emulate.
GAS also provides .balign and .p2align directives,
described later, which have a consistent behavior across all
architectures (but are specific to GAS).
.ascii "string"....ascii expects zero or more string literals (see Strings)
separated by commas. It assembles each string (with no automatic
trailing zero byte) into consecutive addresses.
.asciz "string"....asciz is just like .ascii, but each string is followed by
a zero byte. The "z" in .asciz stands for "zero".
.balign[wl] abs-expr, abs-expr, abs-exprPad the location counter (in the current subsection) to a particular
storage boundary. The first expression (which must be absolute) is the
alignment request in bytes. For example .balign 8 advances
the location counter until it is a multiple of 8. If the location counter
is already a multiple of 8, no change is needed.
The second expression (also absolute) gives the fill value to be stored in the padding bytes. It (and the comma) may be omitted. If it is omitted, the padding bytes are normally zero. However, on some systems, if the section is marked as containing code and the fill value is omitted, the space is filled with no-op instructions.
The third expression is also absolute, and is also optional. If it is present, it is the maximum number of bytes that should be skipped by this alignment directive. If doing the alignment would require skipping more bytes than the specified maximum, then the alignment is not done at all. You can omit the fill value (the second argument) entirely by simply using two commas after the required alignment; this can be useful if you want the alignment to be filled with no-op instructions when appropriate.
The .balignw and .balignl directives are variants of the
.balign directive. The .balignw directive treats the fill
pattern as a two byte word value. The .balignl directives treats the
fill pattern as a four byte longword value. For example, .balignw
4,0x368d will align to a multiple of 4. If it skips two bytes, they will be
filled in with the value 0x368d (the exact placement of the bytes depends upon
the endianness of the processor). If it skips 1 or 3 bytes, the fill value is
undefined.
.byte expressions.byte expects zero or more expressions, separated by commas.
Each expression is assembled into the next byte.
.comm symbol , length .comm declares a common symbol named symbol. When linking, a
common symbol in one object file may be merged with a defined or common symbol
of the same name in another object file. If ld does not see a
definition for the symbol-just one or more common symbols-then it will
allocate length bytes of uninitialized memory. length must be an
absolute expression. If ld sees multiple common symbols with
the same name, and they do not all have the same size, it will allocate space
using the largest size.
When using ELF, the .comm directive takes an optional third argument.
This is the desired alignment of the symbol, specified as a byte boundary (for
example, an alignment of 16 means that the least significant 4 bits of the
address should be zero). The alignment must be an absolute expression, and it
must be a power of two. If ld allocates uninitialized memory
for the common symbol, it will use the alignment when placing the symbol. If
no alignment is specified, as will set the alignment to the
largest power of two less than or equal to the size of the symbol, up to a
maximum of 16.
The syntax for .comm differs slightly on the HPPA. The syntax is
symbol .comm, length; symbol is optional.
.data subsection.data tells as to assemble the following statements onto the
end of the data subsection numbered subsection (which is an
absolute expression). If subsection is omitted, it defaults
to zero.
.def nameBegin defining debugging information for a symbol name; the
definition extends until the .endef directive is encountered.
This directive is only observed when as is configured for COFF
format output; when producing b.out, .def is recognized,
but ignored.
.desc symbol, abs-expressionThis directive sets the descriptor of the symbol (see Symbol Attributes) to the low 16 bits of an absolute expression.
The .desc directive is not available when as is
configured for COFF output; it is only for a.out or b.out
object format. For the sake of compatibility, as accepts
it, but produces no output, when configured for COFF.
.dimThis directive is generated by compilers to include auxiliary debugging
information in the symbol table. It is only permitted inside
.def/.endef pairs.
.dim is only meaningful when generating COFF format output; when
as is generating b.out, it accepts this directive but
ignores it.
.double flonums.double expects zero or more flonums, separated by commas. It
assembles floating point numbers.
The exact kind of floating point numbers emitted depends on how
as is configured. See Machine Dependencies.
.ejectForce a page break at this point, when generating assembly listings.
.else.else is part of the as support for conditional
assembly; see .if. It marks the beginning of a section
of code to be assembled if the condition for the preceding .if
was false.
.elseif.elseif is part of the as support for conditional
assembly; see .if. It is shorthand for beginning a new
.if block that would otherwise fill the entire .else section.
.end.end marks the end of the assembly file. as does not
process anything in the file past the .end directive.
.endefThis directive flags the end of a symbol definition begun with
.def.
.endef is only meaningful when generating COFF format output; if
as is configured to generate b.out, it accepts this
directive but ignores it.
.endfunc.endfunc marks the end of a function specified with .func.
.endif.endif is part of the as support for conditional assembly;
it marks the end of a block of code that is only assembled
conditionally. See .if.
.equ symbol, expressionThis directive sets the value of symbol to expression.
It is synonymous with .set; see .set.
The syntax for equ on the HPPA is
symbol .equ expression.
.equiv symbol, expressionThe .equiv directive is like .equ and .set, except that
the assembler will signal an error if symbol is already defined.
Except for the contents of the error message, this is roughly equivalent to
.ifdef SYM .err .endif .equ SYM,VAL
.errIf as assembles a .err directive, it will print an error
message and, unless the -Z option was used, it will not generate an
object file. This can be used to signal error an conditionally compiled code.
.exitmExit early from the current macro definition. See Macro.
.extern.extern is accepted in the source program--for compatibility
with other assemblers--but it is ignored. as treats
all undefined symbols as external.
.fail expressionGenerates an error or a warning. If the value of the expression is 500
or more, as will print a warning message. If the value is less
than 500, as will print an error message. The message will
include the value of expression. This can occasionally be useful inside
complex nested macros or conditional assembly.
.file string.file tells as that we are about to start a new logical
file. string is the new file name. In general, the filename is
recognized whether or not it is surrounded by quotes "; but if you wish
to specify an empty file name, you must give the quotes-"". This
statement may go away in future: it is only recognized to be compatible with
old as programs.
In some configurations of as, .file has already been
removed to avoid conflicts with other assemblers. See Machine Dependencies.
.fill repeat , size , valuerepeat, size and value are absolute expressions.
This emits repeat copies of size bytes. Repeat
may be zero or more. Size may be zero or more, but if it is
more than 8, then it is deemed to have the value 8, compatible with
other people's assemblers. The contents of each repeat bytes
is taken from an 8-byte number. The highest order 4 bytes are
zero. The lowest order 4 bytes are value rendered in the
byte-order of an integer on the computer as is assembling for.
Each size bytes in a repetition is taken from the lowest order
size bytes of this number. Again, this bizarre behavior is
compatible with other people's assemblers.
size and value are optional. If the second comma and value are absent, value is assumed zero. If the first comma and following tokens are absent, size is assumed to be 1.
.float flonumsThis directive assembles zero or more flonums, separated by commas. It
has the same effect as .single.
The exact kind of floating point numbers emitted depends on how
as is configured.
See Machine Dependencies.
.func name[,label].func emits debugging information to denote function name, and
is ignored unless the file is assembled with debugging enabled.
Only --gstabs is currently supported.
label is the entry point of the function and if omitted name
prepended with the leading char is used.
leading char is usually _ or nothing, depending on the target.
All functions are currently defined to have void return type.
The function must be terminated with .endfunc.
.global symbol, .globl symbol.global makes the symbol visible to ld. If you define
symbol in your partial program, its value is made available to
other partial programs that are linked with it. Otherwise,
symbol takes its attributes from a symbol of the same name
from another file linked into the same program.
Both spellings (.globl and .global) are accepted, for
compatibility with other assemblers.
On the HPPA, .global is not always enough to make it accessible to other
partial programs. You may need the HPPA-only .EXPORT directive as well.
See HPPA Assembler Directives.
.hidden namesThis one of the ELF visibility directives. The other two are
.internal (see .internal) and
.protected (see .protected).
This directive overrides the named symbols default visibility (which is set by
their binding: local, global or weak). The directive sets the visibility to
hidden which means that the symbols are not visible to other components.
Such symbols are always considered to be protected as well.
.hword expressionsThis expects zero or more expressions, and emits a 16 bit number for each.
This directive is a synonym for .short; depending on the target
architecture, it may also be a synonym for .word.
.identThis directive is used by some assemblers to place tags in object files.
as simply accepts the directive for source-file
compatibility with such assemblers, but does not actually emit anything
for it.
.if absolute expression.if marks the beginning of a section of code which is only
considered part of the source program being assembled if the argument
(which must be an absolute expression) is non-zero. The end of
the conditional section of code must be marked by .endif
(see .endif); optionally, you may include code for the
alternative condition, flagged by .else (see .else).
If you have several conditions to check, .elseif may be used to avoid
nesting blocks if/else within each subsequent .else block.
The following variants of .if are also supported:
.ifdef symbol
.ifc string1,string2
.ifeq absolute expression
.ifeqs string1,string2
.ifc. The strings must be quoted using double quotes.
.ifge absolute expression
.ifgt absolute expression
.ifle absolute expression
.iflt absolute expression
.ifnc string1,string2.
.ifc, but the sense of the test is reversed: this assembles the
following section of code if the two strings are not the same.
.ifndef symbol
.ifnotdef symbol
.ifne absolute expression
.if).
.ifnes string1,string2
.ifeqs, but the sense of the test is reversed: this assembles the
following section of code if the two strings are not the same.
.incbin "file"[,skip[,count]]The incbin directive includes file verbatim at the current
location. You can control the search paths used with the -I command-line
option (see Command-Line Options). Quotation marks are required
around file.
The skip argument skips a number of bytes from the start of the
file. The count argument indicates the maximum number of bytes to
read. Note that the data is not aligned in any way, so it is the user's
responsibility to make sure that proper alignment is provided both before and
after the incbin directive.
.include "file"This directive provides a way to include supporting files at specified
points in your source program. The code from file is assembled as
if it followed the point of the .include; when the end of the
included file is reached, assembly of the original file continues. You
can control the search paths used with the -I command-line option
(see Command-Line Options). Quotation marks are required
around file.
.int expressionsExpect zero or more expressions, of any section, separated by commas. For each expression, emit a number that, at run time, is the value of that expression. The byte order and bit size of the number depends on what kind of target the assembly is for.
.internal namesThis one of the ELF visibility directives. The other two are
.hidden (see .hidden) and
.protected (see .protected).
This directive overrides the named symbols default visibility (which is set by
their binding: local, global or weak). The directive sets the visibility to
internal which means that the symbols are considered to be hidden
(ie not visible to other components), and that some extra, processor specific
processing must also be performed upon the symbols as well.
.irp symbol,values...Evaluate a sequence of statements assigning different values to symbol.
The sequence of statements starts at the .irp directive, and is
terminated by an .endr directive. For each value, symbol is
set to value, and the sequence of statements is assembled. If no
value is listed, the sequence of statements is assembled once, with
symbol set to the null string. To refer to symbol within the
sequence of statements, use \symbol.
For example, assembling
.irp param,1,2,3
move d\param,sp@-
.endr
is equivalent to assembling
move d1,sp@-
move d2,sp@-
move d3,sp@-
.irpc symbol,values...Evaluate a sequence of statements assigning different values to symbol.
The sequence of statements starts at the .irpc directive, and is
terminated by an .endr directive. For each character in value,
symbol is set to the character, and the sequence of statements is
assembled. If no value is listed, the sequence of statements is
assembled once, with symbol set to the null string. To refer to
symbol within the sequence of statements, use \symbol.
For example, assembling
.irpc param,123
move d\param,sp@-
.endr
is equivalent to assembling
move d1,sp@-
move d2,sp@-
move d3,sp@-
.lcomm symbol , lengthReserve length (an absolute expression) bytes for a local common
denoted by symbol. The section and value of symbol are
those of the new local common. The addresses are allocated in the bss
section, so that at run-time the bytes start off zeroed. Symbol
is not declared global (see .global), so is normally
not visible to ld.
Some targets permit a third argument to be used with .lcomm. This
argument specifies the desired alignment of the symbol in the bss section.
The syntax for .lcomm differs slightly on the HPPA. The syntax is
symbol .lcomm, length; symbol is optional.
.lflagsas accepts this directive, for compatibility with other
assemblers, but ignores it.
.line line-numberChange the logical line number. line-number must be an absolute
expression. The next line has that logical line number. Therefore any other
statements on the current line (after a statement separator character) are
reported as on logical line number line-number - 1. One day
as will no longer support this directive: it is recognized only
for compatibility with existing assembler programs.
Warning: In the AMD29K configuration of as, this command is
not available; use the synonym .ln in that context.
Even though this is a directive associated with the a.out or
b.out object-code formats, as still recognizes it
when producing COFF output, and treats .line as though it
were the COFF .ln if it is found outside a
.def/.endef pair.
Inside a .def, .line is, instead, one of the directives
used by compilers to generate auxiliary symbol information for
debugging.
.linkonce [type]Mark the current section so that the linker only includes a single copy of it.
This may be used to include the same section in several different object files,
but ensure that the linker will only include it once in the final output file.
The .linkonce pseudo-op must be used for each instance of the section.
Duplicate sections are detected based on the section name, so it should be
unique.
This directive is only supported by a few object file formats; as of this writing, the only object file format which supports it is the Portable Executable format used on Windows NT.
The type argument is optional. If specified, it must be one of the
following strings. For example:
.linkonce same_sizeNot all types may be supported on all object file formats.
discard
one_only
same_size
same_contents
.ln line-number.ln is a synonym for .line.
.mri valIf val is non-zero, this tells as to enter MRI mode. If
val is zero, this tells as to exit MRI mode. This change
affects code assembled until the next .mri directive, or until the end
of the file. See MRI mode.
.listControl (in conjunction with the .nolist directive) whether or
not assembly listings are generated. These two directives maintain an
internal counter (which is zero initially). .list increments the
counter, and .nolist decrements it. Assembly listings are
generated whenever the counter is greater than zero.
By default, listings are disabled. When you enable them (with the
-a command line option; see Command-Line Options),
the initial value of the listing counter is one.
.long expressions.long is the same as .int, see .int.
.macroThe commands .macro and .endm allow you to define macros that
generate assembly output. For example, this definition specifies a macro
sum that puts a sequence of numbers into memory:
.macro sum from=0, to=5
.long \from
.if \to-\from
sum "(\from+1)",\to
.endif
.endm
With that definition, SUM 0,5 is equivalent to this assembly input:
.long 0
.long 1
.long 2
.long 3
.long 4
.long 5
.macro macname
.macro macname macargs ...
=deflt. For
example, these are all valid .macro statements:
.macro comm
comm, which takes no
arguments.
.macro plus1 p, p1
.macro plus1 p p1
plus1,
which takes two arguments; within the macro definition, write
\p or \p1 to evaluate the arguments.
.macro reserve_str p1=0 p2
reserve_str, with two
arguments. The first argument has a default value, but not the second.
After the definition is complete, you can call the macro either as
reserve_str a,b (with \p1 evaluating to
a and \p2 evaluating to b), or as reserve_str
,b (with \p1 evaluating as the default, in this case
0, and \p2 evaluating to b).
When you call a macro, you can specify the argument values either by
position, or by keyword. For example, sum 9,17 is equivalent to
sum to=17, from=9.
.endm
.exitm
\@
as maintains a counter of how many macros it has
executed in this pseudo-variable; you can copy that number to your
output with \@, but only within a macro definition.
.nolistControl (in conjunction with the .list directive) whether or
not assembly listings are generated. These two directives maintain an
internal counter (which is zero initially). .list increments the
counter, and .nolist decrements it. Assembly listings are
generated whenever the counter is greater than zero.
.octa bignumsThis directive expects zero or more bignums, separated by commas. For each bignum, it emits a 16-byte integer.
The term "octa" comes from contexts in which a "word" is two bytes; hence octa-word for 16 bytes.
.org new-lc , fillAdvance the location counter of the current section to
new-lc. new-lc is either an absolute expression or an
expression with the same section as the current subsection. That is,
you can't use .org to cross sections: if new-lc has the
wrong section, the .org directive is ignored. To be compatible
with former assemblers, if the section of new-lc is absolute,
as issues a warning, then pretends the section of new-lc
is the same as the current subsection.
.org may only increase the location counter, or leave it
unchanged; you cannot use .org to move the location counter
backwards.
Because as tries to assemble programs in one pass, new-lc
may not be undefined. If you really detest this restriction we eagerly await
a chance to share your improved assembler.
Beware that the origin is relative to the start of the section, not to the start of the subsection. This is compatible with other people's assemblers.
When the location counter (of the current subsection) is advanced, the intervening bytes are filled with fill which should be an absolute expression. If the comma and fill are omitted, fill defaults to zero.
.p2align[wl] abs-expr, abs-expr, abs-exprPad the location counter (in the current subsection) to a particular
storage boundary. The first expression (which must be absolute) is the
number of low-order zero bits the location counter must have after
advancement. For example .p2align 3 advances the location
counter until it a multiple of 8. If the location counter is already a
multiple of 8, no change is needed.
The second expression (also absolute) gives the fill value to be stored in the padding bytes. It (and the comma) may be omitted. If it is omitted, the padding bytes are normally zero. However, on some systems, if the section is marked as containing code and the fill value is omitted, the space is filled with no-op instructions.
The third expression is also absolute, and is also optional. If it is present, it is the maximum number of bytes that should be skipped by this alignment directive. If doing the alignment would require skipping more bytes than the specified maximum, then the alignment is not done at all. You can omit the fill value (the second argument) entirely by simply using two commas after the required alignment; this can be useful if you want the alignment to be filled with no-op instructions when appropriate.
The .p2alignw and .p2alignl directives are variants of the
.p2align directive. The .p2alignw directive treats the fill
pattern as a two byte word value. The .p2alignl directives treats the
fill pattern as a four byte longword value. For example, .p2alignw
2,0x368d will align to a multiple of 4. If it skips two bytes, they will be
filled in with the value 0x368d (the exact placement of the bytes depends upon
the endianness of the processor). If it skips 1 or 3 bytes, the fill value is
undefined.
.previousThis is one of the ELF section stack manipulation directives. The others are
.section (see Section), .subsection (see SubSection),
.pushsection (see PushSection), and .popsection
(see PopSection).
This directive swaps the current section (and subsection) with most recently
referenced section (and subsection) prior to this one. Multiple
.previous directives in a row will flip between two sections (and their
subsections).
In terms of the section stack, this directive swaps the current section with the top section on the section stack.
.popsectionThis is one of the ELF section stack manipulation directives. The others are
.section (see Section), .subsection (see SubSection),
.pushsection (see PushSection), and .previous
(see Previous).
This directive replaces the current section (and subsection) with the top section (and subsection) on the section stack. This section is popped off the stack.
.print stringas will print string on the standard output during
assembly. You must put string in double quotes.
.protected namesThis one of the ELF visibility directives. The other two are
.hidden (see Hidden) and .internal (see Internal).
This directive overrides the named symbols default visibility (which is set by
their binding: local, global or weak). The directive sets the visibility to
protected which means that any references to the symbols from within the
components that defines them must be resolved to the definition in that
component, even if a definition in another component would normally preempt
this.
.psize lines , columnsUse this directive to declare the number of lines--and, optionally, the number of columns--to use for each page, when generating listings.
If you do not use .psize, listings use a default line-count
of 60. You may omit the comma and columns specification; the
default width is 200 columns.
as generates formfeeds whenever the specified number of
lines is exceeded (or whenever you explicitly request one, using
.eject).
If you specify lines as 0, no formfeeds are generated save
those explicitly specified with .eject.
.purgem nameUndefine the macro name, so that later uses of the string will not be expanded. See Macro.
.pushsection name , subsectionThis is one of the ELF section stack manipulation directives. The others are
.section (see Section), .subsection (see SubSection),
.popsection (see PopSection), and .previous
(see Previous).
This directive is a synonym for .section. It pushes the current section
(and subsection) onto the top of the section stack, and then replaces the
current section and subsection with name and subsection.
.quad bignums.quad expects zero or more bignums, separated by commas. For
each bignum, it emits
an 8-byte integer. If the bignum won't fit in 8 bytes, it prints a
warning message; and just takes the lowest order 8 bytes of the bignum.
The term "quad" comes from contexts in which a "word" is two bytes; hence quad-word for 8 bytes.
.rept countRepeat the sequence of lines between the .rept directive and the next
.endr directive count times.
For example, assembling
.rept 3
.long 0
.endr
is equivalent to assembling
.long 0
.long 0
.long 0
.sbttl "subheading"Use subheading as the title (third line, immediately after the title line) when generating assembly listings.
This directive affects subsequent pages, as well as the current page if it appears within ten lines of the top of a page.
.scl classSet the storage-class value for a symbol. This directive may only be
used inside a .def/.endef pair. Storage class may flag
whether a symbol is static or external, or it may record further
symbolic debugging information.
The .scl directive is primarily associated with COFF output; when
configured to generate b.out output format, as
accepts this directive but ignores it.
.section name (COFF version)Use the .section directive to assemble the following code into a section
named name.
This directive is only supported for targets that actually support arbitrarily
named sections; on a.out targets, for example, it is not accepted, even
with a standard a.out section name.
For COFF targets, the .section directive is used in one of the following
ways:
.section name[, "flags"] .section name[, subsegment]
If the optional argument is quoted, it is taken as flags to use for the section. Each flag is a single character. The following flags are recognized:
b
n
w
d
r
x
s
If no flags are specified, the default flags depend upon the section name. If
the section name is not recognized, the default will be for the section to be
loaded and writable. Note the n and w flags remove attributes
from the section, rather than adding them, so if they are used on their own it
will be as if no flags had been specified at all.
If the optional argument to the .section directive is not quoted, it is
taken as a subsegment number (see Sub-Sections).
.section name (ELF version)This is one of the ELF section stack manipulation directives. The others are
.subsection (see SubSection), .pushsection
(see PushSection), .popsection (see PopSection), and
.previous (see Previous).
For ELF targets, the .section directive is used like this:
.section name [, "flags"[, @type[, @entsize]]]
The optional flags argument is a quoted string which may contain any combination of the following characters:
a
w
x
M
S
The optional type argument may contain one of the following constants:
@progbits
@nobits
If flags contains M flag, type argument must be specified
as well as entsize argument. Sections with M flag but not
S flag must contain fixed size constants, each entsize octets
long. Sections with both M and S must contain zero terminated
strings where each character is entsize bytes long. The linker may remove
duplicates within sections with the same name, same entity size and same flags.
If no flags are specified, the default flags depend upon the section name. If the section name is not recognized, the default will be for the section to have none of the above flags: it will not be allocated in memory, nor writable, nor executable. The section will contain data.
For ELF targets, the assembler supports another type of .section
directive for compatibility with the Solaris assembler:
.section "name"[, flags...]
Note that the section name is quoted. There may be a sequence of comma separated flags:
#alloc
#write
#execinstr
This directive replaces the current section and subsection. The replaced
section and subsection are pushed onto the section stack. See the contents of
the gas testsuite directory gas/testsuite/gas/elf for some examples of
how this directive and the other section stack directives work.
.set symbol, expressionSet the value of symbol to expression. This changes symbol's value and type to conform to expression. If symbol was flagged as external, it remains flagged (see Symbol Attributes).
You may .set a symbol many times in the same assembly.
If you .set a global symbol, the value stored in the object
file is the last value stored into it.
The syntax for set on the HPPA is
symbol .set expression.
.short expressions.short is normally the same as .word.
See .word.
In some configurations, however, .short and .word generate
numbers of different lengths; see Machine Dependencies.
.single flonumsThis directive assembles zero or more flonums, separated by commas. It
has the same effect as .float.
The exact kind of floating point numbers emitted depends on how
as is configured. See Machine Dependencies.
.size (COFF version)This directive is generated by compilers to include auxiliary debugging
information in the symbol table. It is only permitted inside
.def/.endef pairs.
.size is only meaningful when generating COFF format output; when
as is generating b.out, it accepts this directive but
ignores it.
.size name , expression (ELF version)This directive is used to set the size associated with a symbol name. The size in bytes is computed from expression which can make use of label arithmetic. This directive is typically used to set the size of function symbols.
.sleb128 expressionssleb128 stands for "signed little endian base 128." This is a
compact, variable length representation of numbers used by the DWARF
symbolic debugging format. See .uleb128.
.skip size , fillThis directive emits size bytes, each of value fill. Both
size and fill are absolute expressions. If the comma and
fill are omitted, fill is assumed to be zero. This is the same as
.space.
.space size , fillThis directive emits size bytes, each of value fill. Both
size and fill are absolute expressions. If the comma
and fill are omitted, fill is assumed to be zero. This is the same
as .skip.
Warning:.spacehas a completely different meaning for HPPA targets; use.blockas a substitute. See HP9000 Series 800 Assembly Language Reference Manual (HP 92432-90001) for the meaning of the.spacedirective. See HPPA Assembler Directives, for a summary.
On the AMD 29K, this directive is ignored; it is accepted for compatibility with other AMD 29K assemblers.
Warning: In most versions of the GNU assembler, the directive.spacehas the effect of.blockSee Machine Dependencies.
.stabd, .stabn, .stabsThere are three directives that begin .stab.
All emit symbols (see Symbols), for use by symbolic debuggers.
The symbols are not entered in the as hash table: they
cannot be referenced elsewhere in the source file.
Up to five fields are required:
\000, so is more general than ordinary symbol names. Some
debuggers used to code arbitrarily complex structures into symbol names
using this field.
ld
and debuggers choke on silly bit patterns.
If a warning is detected while reading a .stabd, .stabn,
or .stabs statement, the symbol has probably already been created;
you get a half-formed symbol in your object file. This is
compatible with earlier assemblers!
.stabd type , other , desc
The symbol's value is set to the location counter,
relocatably. When your program is linked, the value of this symbol
is the address of the location counter when the .stabd was
assembled.
.stabn type , other , desc , value
"".
.stabs string , type , other , desc , value
.string "str"Copy the characters in str to the object file. You may specify more than one string to copy, separated by commas. Unless otherwise specified for a particular machine, the assembler marks the end of each string with a 0 byte. You can use any of the escape sequences described in Strings.
.struct expressionSwitch to the absolute section, and set the section offset to expression,
which must be an absolute expression. You might use this as follows:
.struct 0
field1:
.struct field1 + 4
field2:
.struct field2 + 4
field3:
This would define the symbol field1 to have the value 0, the symbol
field2 to have the value 4, and the symbol field3 to have the
value 8. Assembly would be left in the absolute section, and you would need to
use a .section directive of some sort to change to some other section
before further assembly.
.subsection nameThis is one of the ELF section stack manipulation directives. The others are
.section (see Section), .pushsection (see PushSection),
.popsection (see PopSection), and .previous
(see Previous).
This directive replaces the current subsection with name. The current
section is not changed. The replaced subsection is put onto the section stack
in place of the then current top of stack subsection.
.symverUse the .symver directive to bind symbols to specific version nodes
within a source file. This is only supported on ELF platforms, and is
typically used when assembling files to be linked into a shared library.
There are cases where it may make sense to use this in objects to be bound
into an application itself so as to override a versioned symbol from a
shared library.
For ELF targets, the .symver directive can be used like this:
.symver name, name2@nodenameIf the symbol name is defined within the file being assembled, the
.symver directive effectively creates a symbol
alias with the name name2@nodename, and in fact the main reason that we
just don't try and create a regular alias is that the @ character isn't
permitted in symbol names. The name2 part of the name is the actual name
of the symbol by which it will be externally referenced. The name name
itself is merely a name of convenience that is used so that it is possible to
have definitions for multiple versions of a function within a single source
file, and so that the compiler can unambiguously know which version of a
function is being mentioned. The nodename portion of the alias should be
the name of a node specified in the version script supplied to the linker when
building a shared library. If you are attempting to override a versioned
symbol from a shared library, then nodename should correspond to the
nodename of the symbol you are trying to override.
If the symbol name is not defined within the file being assembled, all references to name will be changed to name2@nodename. If no reference to name is made, name2@nodename will be removed from the symbol table.
Another usage of the .symver directive is:
.symver name, name2@@nodenameIn this case, the symbol name must exist and be defined within the file being assembled. It is similar to name2@nodename. The difference is name2@@nodename will also be used to resolve references to name2 by the linker.
The third usage of the .symver directive is:
.symver name, name2@@@nodenameWhen name is not defined within the file being assembled, it is treated as name2@nodename. When name is defined within the file being assembled, the symbol name, name, will be changed to name2@@nodename.
.tag structnameThis directive is generated by compilers to include auxiliary debugging
information in the symbol table. It is only permitted inside
.def/.endef pairs. Tags are used to link structure
definitions in the symbol table with instances of those structures.
.tag is only used when generating COFF format output; when
as is generating b.out, it accepts this directive but
ignores it.
.text subsectionTells as to assemble the following statements onto the end of
the text subsection numbered subsection, which is an absolute
expression. If subsection is omitted, subsection number zero
is used.
.title "heading"Use heading as the title (second line, immediately after the source file name and pagenumber) when generating assembly listings.
This directive affects subsequent pages, as well as the current page if it appears within ten lines of the top of a page.
.type int (COFF version)This directive, permitted only within .def/.endef pairs,
records the integer int as the type attribute of a symbol table entry.
.type is associated only with COFF format output; when
as is configured for b.out output, it accepts this
directive but ignores it.
.type name , type description (ELF version)This directive is used to set the type of symbol name to be either a
function symbol or an object symbol. There are five different syntaxes
supported for the type description field, in order to provide
compatibility with various other assemblers. The syntaxes supported are:
.type <name>,#function .type <name>,#object .type <name>,@function .type <name>,@object .type <name>,%function .type <name>,%object .type <name>,"function" .type <name>,"object" .type <name> STT_FUNCTION .type <name> STT_OBJECT
.uleb128 expressionsuleb128 stands for "unsigned little endian base 128." This is a
compact, variable length representation of numbers used by the DWARF
symbolic debugging format. See .sleb128.
.val addrThis directive, permitted only within .def/.endef pairs,
records the address addr as the value attribute of a symbol table
entry.
.val is used only for COFF output; when as is
configured for b.out, it accepts this directive but ignores it.
.version "string"This directive creates a .note section and places into it an ELF
formatted note of type NT_VERSION. The note's name is set to string.
.vtable_entry table, offsetThis directive finds or creates a symbol table and creates a
VTABLE_ENTRY relocation for it with an addend of offset.
.vtable_inherit child, parentThis directive finds the symbol child and finds or creates the symbol
parent and then creates a VTABLE_INHERIT relocation for the
parent whose addend is the value of the child symbol. As a special case the
parent name of 0 is treated as refering the *ABS* section.
.weak namesThis directive sets the weak attribute on the comma separated list of symbol
names. If the symbols do not already exist, they will be created.
.word expressionsThis directive expects zero or more expressions, of any section, separated by commas.
The size of the number emitted, and its byte order, depend on what target computer the assembly is for.
Warning: Special Treatment to support Compilers
Machines with a 32-bit address space, but that do less than 32-bit addressing, require the following special treatment. If the machine of interest to you does 32-bit addressing (or doesn't require it; see Machine Dependencies), you can ignore this issue.
In order to assemble compiler output into something that works,
as occasionally does strange things to .word directives.
Directives of the form .word sym1-sym2 are often emitted by
compilers as part of jump tables. Therefore, when as assembles a
directive of the form .word sym1-sym2, and the difference between
sym1 and sym2 does not fit in 16 bits, as
creates a secondary jump table, immediately before the next label.
This secondary jump table is preceded by a short-jump to the
first byte after the secondary table. This short-jump prevents the flow
of control from accidentally falling into the new table. Inside the
table is a long-jump to sym2. The original .word
contains sym1 minus the address of the long-jump to
sym2.
If there were several occurrences of .word sym1-sym2 before the
secondary jump table, all of them are adjusted. If there was a
.word sym3-sym4, that also did not fit in sixteen bits, a
long-jump to sym4 is included in the secondary jump table,
and the .word directives are adjusted to contain sym3
minus the address of the long-jump to sym4; and so on, for as many
entries in the original jump table as necessary.
One day these directives won't work. They are included for compatibility with older assemblers.
The machine instruction sets are (almost by definition) different on
each machine where as runs. Floating point representations
vary as well, and as often supports a few additional
directives or command-line options for compatibility with other
assemblers on a particular platform. Finally, some versions of
as support special pseudo-instructions for branch
optimization.
This chapter discusses most of these differences, though it does not include details on any machine's instruction set. For details on that subject, see the hardware manufacturer's manual.
as has no additional command-line options for the AMD
29K family.
The macro syntax used on the AMD 29K is like that described in the AMD
29K Family Macro Assembler Specification. Normal as
macros should still work.
; is the line comment character.
The character ? is permitted in identifiers (but may not begin
an identifier).
General-purpose registers are represented by predefined symbols of the
form GRnnn (for global registers) or LRnnn
(for local registers), where nnn represents a number between
0 and 127, written with no leading zeros. The leading
letters may be in either upper or lower case; for example, gr13
and LR7 are both valid register names.
You may also refer to general-purpose registers by specifying the
register number as the result of an expression (prefixed with %%
to flag the expression as a register number):
%%expression
--where expression must be an absolute expression evaluating to a
number between 0 and 255. The range [0, 127] refers to
global registers, and the range [128, 255] to local registers.
In addition, as understands the following protected
special-purpose register names for the AMD 29K family:
vab chd pc0 ops chc pc1 cps rbp pc2 cfg tmc mmu cha tmr lru
These unprotected special-purpose register names are also recognized:
ipc alu fpe ipa bp inte ipb fc fps q cr exop
The AMD 29K family uses IEEE floating-point numbers.
.block size , fill
In other versions of the GNU assembler, this directive is called
.space.
.cputype
.file
Warning: in other versions of the GNU assembler,.fileis used for the directive called.app-filein the AMD 29K support.
.line
.sect
.use section name
.text, .data,
.data1, or .lit. With one of the first three section
name options, .use is equivalent to the machine directive
section name; the remaining case, .use .lit, is the same as
.data 200.
as implements all the standard AMD 29K opcodes. No
additional pseudo-instructions are needed on this family.
For information on the 29K machine instruction set, see Am29000 User's Manual, Advanced Micro Devices, Inc.
The documentation here is primarily for the ELF object format.
as also supports the ECOFF and EVAX formats, but
features specific to these formats are not yet documented.
-mcpu
.arch directive.
The following processor names are recognized:
21064,
21064a,
21066,
21068,
21164,
21164a,
21164pc,
21264,
ev4,
ev5,
lca45,
ev5,
ev56,
pca56,
ev6.
The special name all may be used to allow the assembler to accept
instructions valid for any Alpha processor.
In order to support existing practice in OSF/1 with respect to .arch,
and existing practice within MILO (the Linux ARC bootloader), the
numbered processor names (e.g. 21064) enable the processor-specific PALcode
instructions, while the "electro-vlasic" names (e.g. ev4) do not.
-mdebug
-no-mdebug
.mdebug encapsulation for
stabs directives and procedure descriptors. The default is to automatically
enable .mdebug when the first stabs directive is seen.
-relax
-g
gcc is using mips-tfile to generate debug
information for ECOFF, local labels must be passed through to the object
file. Otherwise this option has no effect.
-Gsize
.bss,
while smaller symbols are placed in .sbss.
-F
-32addr
The assembler syntax closely follow the Alpha Reference Manual; assembler directives and general syntax closely follow the OSF/1 and OpenVMS syntax, with a few differences for ELF.
# is the line comment character.
; can be used instead of a newline to separate statements.
The 32 integer registers are refered to as $n or
$rn. In addition, registers 15, 28, 29, and 30 may
be refered to by the symbols $fp, $at, $gp,
and $sp respectively.
The 32 floating-point registers are refered to as $fn.
Some of these relocations are available for ECOFF, but mostly only for ELF. They are modeled after the relocation format introduced in Digial Unix 4.0, but there are additions.
The format is !tag or !tag!number
where tag is the name of the relocation. In some cases
number is used to relate specific instructions.
The relocation is placed at the end of the instruction like so:
ldah $0,a($29) !gprelhigh lda $0,a($0) !gprellow ldq $1,b($29) !literal!100 ldl $2,0($1) !lituse_base!100
!literal
!literal!N
ldq instruction to load the address of a symbol
from the GOT.
A sequence number N is optional, and if present is used to pair
lituse relocations with this literal relocation. The
lituse relocations are used by the linker to optimize the code
based on the final location of the symbol.
Note that these optimizations are dependent on the data flow of the
program. Therefore, if any lituse is paired with a
literal relocation, then all uses of the register set by
the literal instruction must also be marked with lituse
relocations. This is because the original literal instruction
may be deleted or transformed into another instruction.
Also note that there may be a one-to-many relationship between
literal and lituse, but not a many-to-one. That is, if
there are two code paths that load up the same address and feed the
value to a single use, then the use may not use a lituse
relocation.
!lituse_base!N
ldl) to indicate
that the literal is used for an address load. The offset field of the
instruction must be zero. During relaxation, the code may be altered
to use a gp-relative load.
!lituse_jsr!N
jsr) to
indicate that the literal is used for a call. During relaxation, the
code may be altered to use a direct branch (e.g. bsr).
!lituse_bytoff!N
extbl) to indicate
that only the low 3 bits of the address are relevant. During relaxation,
the code may be altered to use an immediate instead of a register shift.
!lituse_addr!N
ldq instruction may not be
altered or deleted. This is useful in conjunction with lituse_jsr
to test whether a weak symbol is defined.
ldq $27,foo($29) !literal!1 beq $27,is_undef !lituse_addr!1 jsr $26,($27),foo !lituse_jsr!1
!gpdisp!N
ldah and lda to load the GP from the current
address, a-la the ldgp macro. The source register for the
ldah instruction must contain the address of the ldah
instruction. There must be exactly one lda instruction paired
with the ldah instruction, though it may appear anywhere in
the instruction stream. The immediate operands must be zero.
bsr $26,foo ldah $29,0($26) !gpdisp!1 lda $29,0($29) !gpdisp!1
!gprelhigh
ldah instruction to add the high 16 bits of a
32-bit displacement from the GP.
!gprellow
!gprel
!samegp
$27
or perform a standard GP load in the first two instructions via the
.prologue directive.
The Alpha family uses both IEEE and VAX floating-point numbers.
as for the Alpha supports many additional directives for
compatibility with the native assembler. This section describes them only
briefly.
These are the additional directives in as for the Alpha:
.arch cpu
-mcpu command-line option. See Options,
for a list of values for cpu.
.ent function[, n]
.mdebug information, this will create a procedure descriptor for
the function. In ELF, it will mark the symbol as a function a-la the
generic .type directive.
.end function
.size directive.
.mask mask, offset
$26) is saved first.
This and the other directives that describe the stack frame are
currently only used when generating .mdebug information. They
may in the future be used to generate DWARF2 .debug_frame unwind
information for hand written assembly.
.fmask mask, offset
.mask.
.frame framereg, frameoffset, retreg[, argoffset]
$fp or $sp. The
frame pointer is frameoffset bytes below the CFA. The return
address is initially located in retreg until it is saved as
indicated in .mask. For compatibility with OSF/1 an optional
argoffset parameter is accepted and ignored. It is believed to
indicate the offset from the CFA to the saved argument registers.
.prologue n
$27. 0 indicates that $27 is not used; 1
indicates that the first two instructions of the function use $27
to perform a load of the GP register; 2 indicates that $27 is
used in some non-standard way and so the linker cannot elide the load of
the procedure vector during relaxation.
.gprel32 expression
.t_floating expression
.s_floating expression
.f_floating expression
.g_floating expression
.d_floating expression
.set feature
nofeature disables.
at
$at or $28) register. Some macros may not be
expanded without this and will generate an error message if noat
is in effect. When at is in effect, a warning will be generated
if $at is used by the programmer.
macro
br label vs br $31,label are
considered alternate forms and not macros.
move
reorder
volatile
as
does not do instruction scheduling, so these features are ignored.
The following directives are recognized for compatibility with the OSF/1
assembler but are ignored.
.proc .aproc .reguse .livereg .option .aent .ugen .eflag .alias .noalias
For detailed information on the Alpha machine instruction set, see the Alpha Architecture Handbook.
-marc[5|6|7|8]
-marc is the same as -marc6, which
is also the default.
arc5
arc6
mov.f r0,r1 beq foo
arc7
arc8
Note: the .option directive can to be used to select a core
variant from within assembly code.
-EB
-EL
*TODO*
*TODO*
The ARC core does not currently have hardware floating point
support. Software floating point support is provided by GCC
and uses IEEE floating-point numbers.
The ARC version of as supports the following additional
machine directives:
.2byte expressions
.3byte expressions
.4byte expressions
.extAuxRegister name,address,mode
.extAuxRegister mulhi,0x12,w
.extCondCode suffix,value
.extCondCode is_busy,0x14
.extCoreRegister name,regnum,mode,shortcut
.extCoreRegister mlo,57,r,can_shortcut
.extInstruction name,opcode,subopcode,suffixclass,syntaxclass
.extInstruction mul64,0x14,0x0,SUFFIX_COND,SYNTAX_3OP|OP1_MUST_BE_IMM
.half expressions
.long expressions
.option arc|arc5|arc6|arc7|arc8
.option directive must be followed by the desired core
version. Again arc is an alias for
arc6.
Note: the .option directive overrides the command line option
-marc; a warning is emitted when the version is not consistent
between the two - even for the implicit default core version
(arc6).
.short expressions
.word expressions
For information on the ARC instruction set, see ARC Programmers Reference Manual, ARC Cores Ltd.
-mcpu=processor[+extension...]
arm1,
arm2,
arm250,
arm3,
arm6,
arm60,
arm600,
arm610,
arm620,
arm7,
arm7m,
arm7d,
arm7dm,
arm7di,
arm7dmi,
arm70,
arm700,
arm700i,
arm710,
arm710t,
arm720,
arm720t,
arm740t,
arm710c,
arm7100,
arm7500,
arm7500fe,
arm7t,
arm7tdmi,
arm8,
arm810,
strongarm,
strongarm1,
strongarm110,
strongarm1100,
strongarm1110,
arm9,
arm920,
arm920t,
arm922t,
arm940t,
arm9tdmi,
arm9e,
arm946e-r0,
arm946e,
arm966e-r0,
arm966e,
arm10t,
arm10e,
arm1020,
arm1020t,
arm1020e,
ep9312 (ARM920 with Cirrus Maverick coprocessor),
i80200 (Intel XScale processor)
and
xscale.
The special name all may be used to allow the
assembler to accept instructions valid for any ARM processor.
In addition to the basic instruction set, the assembler can be told to
accept various extension mnemonics that extend the processor using the
co-processor instruction space. For example, -mcpu=arm920+maverick
is equivalent to specifying -mcpu=ep9312. The following extensions
are currently supported:
+maverick
and
+xscale.
-march=architecture[+extension...]
armv1,
armv2,
armv2a,
armv2s,
armv3,
armv3m,
armv4,
armv4xm,
armv4t,
armv4txm,
armv5,
armv5t,
armv5txm,
armv5te,
armv5texp
and
xscale.
If both -mcpu and
-march are specified, the assembler will use
the setting for -mcpu.
The architecture option can be extended with the same instruction set
extension options as the -mcpu option.
-mfpu=floating-point-format
softfpa,
fpe,
fpe2,
fpe3,
fpa,
fpa10,
fpa11,
arm7500fe,
softvfp,
softvfp+vfp,
vfp,
vfp10,
vfp10-r0,
vfp9,
vfpxd,
arm1020t
and
arm1020e.
In addition to determining which instructions are assembled, this option
also affects the way in which the .double assembler directive behaves
when assembling little-endian code.
The default is dependent on the processor selected. For Architecture 5 or
later, the default is to assembler for VFP instructions; for earlier
architectures the default is to assemble for FPA instructions.
-mthumb
.code 16 directive.
-mthumb-interwork
-mapcs [26|32]
-matpcs
-mapcs-float
-mapcs-reentrant
-EB
-EL
-k
-moabi
The presence of a @ on a line indicates the start of a comment
that extends to the end of the current line. If a # appears as
the first character of a line, the whole line is treated as a comment.
The ; character can be used instead of a newline to separate
statements.
Either # or $ can be used to indicate immediate operands.
*TODO* Explain about /data modifier on symbols.
*TODO* Explain about ARM register naming, and the predefined names.
The ARM family uses IEEE floating-point numbers.
.align expression [, expression]
name .req register name
foo .req r0
.code [16|32]
.thumb
.arm
.force_thumb
.thumb_func
.thumb
.thumb_set
.set directive in that it
creates a symbol which is an alias for another symbol (possibly not yet
defined). This directive also has the added property in that it marks
the aliased symbol as being a thumb function entry point, in the same
way that the .thumb_func directive does.
.ltorg
.pool
as implements all the standard ARM opcodes. It also
implements several pseudo opcodes, including several synthetic load
instructions.
NOP
nop
This pseudo op will always evaluate to a legal ARM instruction that does
nothing. Currently it will evaluate to MOV r0, r0.
LDR
ldr <register> , = <expression>
If expression evaluates to a numeric constant then a MOV or MVN
instruction will be used in place of the LDR instruction, if the
constant can be generated by either of these instructions. Otherwise
the constant will be placed into the nearest literal pool (if it not
already there) and a PC relative LDR instruction will be generated.
ADR
adr <register> <label>
This instruction will load the address of label into the indicated
register. The instruction will evaluate to a PC relative ADD or SUB
instruction depending upon where the label is located. If the label is
out of range, or if it is not defined in the same file (and section) as
the ADR instruction, then an error will be generated. This instruction
will not make use of the literal pool.
ADRL
adrl <register> <label>
This instruction will load the address of label into the indicated register. The instruction will evaluate to one or two PC relative ADD or SUB instructions depending upon where the label is located. If a second instruction is not needed a NOP instruction will be generated in its place, so that this instruction is always 8 bytes long.
If the label is out of range, or if it is not defined in the same file (and section) as the ADRL instruction, then an error will be generated. This instruction will not make use of the literal pool.
For information on the ARM or Thumb instruction sets, see ARM Software Development Toolkit Reference Manual, Advanced RISC Machines Ltd.
The CRIS version of as has these
machine-dependent command-line options.
The format of the generated object files can be either ELF or
a.out, specified by the command-line options
--emulation=crisaout and --emulation=criself.
The default is ELF (criself), unless as has been
configured specifically for a.out by using the configuration
name cris-axis-aout.
There are two different link-incompatible ELF object file
variants for CRIS, for use in environments where symbols are
expected to be prefixed by a leading _ character and for
environments without such a symbol prefix. The variant used for
GNU/Linux port has no symbol prefix. Which variant to produce
is specified by either of the options --underscore and
--no-underscore. The default is --underscore.
Since symbols in CRIS a.out objects are expected to have a
_ prefix, specifying --no-underscore when
generating a.out objects is an error. Besides the object format
difference, the effect of this option is to parse register names
differently (see crisnous). The --no-underscore
option makes a $ register prefix mandatory.
The option --pic must be passed to as in
order to recognize the symbol syntax used for ELF (SVR4 PIC)
position-independent-code (see crispic). This will also
affect expansion of instructions. The expansion with
--pic will use PC-relative rather than (slightly
faster) absolute addresses in those expansions.
When -N is specified, as will emit a
warning when a 16-bit branch instruction is expanded into a
32-bit multiple-instruction construct (see CRIS-Expand).
as will silently choose an instruction that fits
the operand size for [register+constant] operands. For
example, the offset 127 in move.d [r3+127],r4 fits
in an instruction using a signed-byte offset. Similarly,
move.d [r2+32767],r1 will generate an instruction using a
16-bit offset. For symbolic expressions and constants that do
not fit in 16 bits including the sign bit, a 32-bit offset is
generated.
For branches, as will expand from a 16-bit branch
instruction into a sequence of instructions that can reach a
full 32-bit address. Since this does not correspond to a single
instruction, such expansions can optionally be warned about.
See CRIS-Opts.
There are different aspects of the CRIS assembly syntax.
The character # is a line comment character. It starts a
comment if and only if it is placed at the beginning of a line.
A ; character starts a comment anywhere on the line,
causing all characters up to the end of the line to be ignored.
A @ character is handled as a line separator equivalent
to a logical new-line character (except in a comment), so
separate instructions can be specified on a single line.
When generating position-independent code (SVR4
PIC) for use in cris-axis-linux-gnu shared libraries, symbol
suffixes are used to specify what kind of run-time symbol lookup
will be used, expressed in the object as different
relocation types. Usually, all absolute symbol values
must be located in a table, the global offset table,
leaving the code position-independent; independent of values of
global symbols and independent of the address of the code. The
suffix modifies the value of the symbol, into for example an
index into the global offset table where the real symbol value
is entered, or a PC-relative value, or a value relative to the
start of the global offset table. All symbol suffixes start
with the character : (omitted in the list below). Every
symbol use in code or a read-only section must therefore have a
PIC suffix to enable a useful shared library to be created.
Usually, these constructs must not be used with an additive
constant offset as is usually allowed, i.e. no 4 as in
symbol + 4 is allowed. This restriction is checked at
link-time, not at assembly-time.
GOT
R_CRIS_32_GOT. Example: move.d
[$r0+extsym:GOT],$r9
GOT16
GOT, but the value is a 16-bit index into the
global offset table. The corresponding relocation is
R_CRIS_16_GOT. Example: move.d
[$r0+asymbol:GOT16],$r10
PLT
R_CRIS_32_PLT_PCREL.
Example: add.d fnname:PLT,$pc
PLTG
R_CRIS_32_PLT_GOTREL. Example: move.d
fnname:PLTG,$r3
GOTPLT
PLT, but the value of the symbol is a 32-bit
index into the global offset table. This is somewhat of a mix
between the effect of the GOT and the PLT suffix;
the difference to GOT is that there will be a procedure
linkage table entry created, and that the symbol is assumed to
be a function entry and will be resolved by the run-time
resolver as with PLT. The relocation is
R_CRIS_32_GOTPLT. Example: jsr
[$r0+fnname:GOTPLT]
GOTPLT16
GOTPLT giving a 16-bit value. Its
relocation name is R_CRIS_16_GOTPLT. Example: jsr
[$r0+fnname:GOTPLT16]
GOTOFF
R_CRIS_32_GOTREL.
Example: move.d [$r0+localsym:GOTOFF],r3
A $ character may always prefix a general or special
register name in an instruction operand but is mandatory when
the option --no-underscore is specified or when the
.syntax register_prefix directive is in effect
(see crisnous). Register names are case-insensitive.
There are a few CRIS-specific pseudo-directives in addition to the generic ones. See Pseudo Ops. Constants emitted by pseudo-directives are in little-endian order for CRIS. There is no support for floating-point-specific directives for CRIS.
.dword EXPRESSIONS
The .dword directive is a synonym for .int,
expecting zero or more EXPRESSIONS, separated by commas. For
each expression, a 32-bit little-endian constant is emitted.
.syntax ARGUMENT
.syntax directive takes as ARGUMENT one of the
following case-sensitive choices.
no_register_prefix
.syntax no_register_prefix directive
makes a $ character prefix on all registers optional. It
overrides a previous setting, including the corresponding effect
of the option --no-underscore. If this directive is
used when ordinary symbols do not have a _ character
prefix, care must be taken to avoid ambiguities whether an
operand is a register or a symbol; using symbols with names the
same as general or special registers then invoke undefined
behavior.
register_prefix
$ character prefix on all
registers mandatory. It overrides a previous setting, including
the corresponding effect of the option --underscore.
leading_underscore
--no-underscore option is in effect.
no_leading_underscore
.syntax leading_underscore
directive and emits an error if the option --underscore
is in effect.
The Mitsubishi D10V version of as has a few machine
dependent options.
-O
as will attempt to optimize its output by detecting when
instructions can be executed in parallel.
--nowarnswap
as will sometimes swap the
order of instructions. Normally this generates a warning. When this option
is used, no warning will be generated when instructions are swapped.
--gstabs-packing
--no-gstabs-packing
as packs adjacent short instructions into a single packed
instruction. --no-gstabs-packing turns instruction packing off if
--gstabs is specified as well; --gstabs-packing (the
default) turns instruction packing on even when --gstabs is
specified.
The D10V syntax is based on the syntax in Mitsubishi's D10V architecture manual. The differences are detailed below.
The D10V version of as uses the instruction names in the D10V
Architecture Manual. However, the names in the manual are sometimes ambiguous.
There are instruction names that can assemble to a short or long form opcode.
How does the assembler pick the correct form? as will always pick the
smallest form if it can. When dealing with a symbol that is not defined yet when a
line is being assembled, it will always use the long form. If you need to force the
assembler to use either the short or long form of the instruction, you can append
either .s (short) or .l (long) to it. For example, if you are writing
an assembly program and you want to do a branch to a symbol that is defined later
in your program, you can write bra.s foo.
Objdump and GDB will always append .s or .l to instructions which
have both short and long forms.
The D10V assembler takes as input a series of instructions, either one-per-line, or in the special two-per-line format described in the next section. Some of these instructions will be short-form or sub-instructions. These sub-instructions can be packed into a single instruction. The assembler will do this automatically. It will also detect when it should not pack instructions. For example, when a label is defined, the next instruction will never be packaged with the previous one. Whenever a branch and link instruction is called, it will not be packaged with the next instruction so the return address will be valid. Nops are automatically inserted when necessary.
If you do not want the assembler automatically making these decisions, you can control the packaging and execution type (parallel or sequential) with the special execution symbols described in the next section.
; and # are the line comment characters.
Sub-instructions may be executed in order, in reverse-order, or in parallel.
Instructions listed in the standard one-per-line format will be executed sequentially.
To specify the executing order, use the following symbols:
->
<-
||
abs a1 -> abs r0
abs r0 <- abs a1
ld2w r2,@r8+ || mac a0,r0,r7
ld2w r2,@r8+ ||
mac a0,r0,r7
ld2w r2,@r8+
mac a0,r0,r7
ld2w r2,@r8+ ->
mac a0,r0,r7
$ has no special meaning, you may use it in symbol names.
You can use the predefined symbols r0 through r15 to refer to the D10V
registers. You can also use sp as an alias for r15. The accumulators
are a0 and a1. There are special register-pair names that may
optionally be used in opcodes that require even-numbered registers. Register names are
not case sensitive.
Register Pairs
r0-r1
r2-r3
r4-r5
r6-r7
r8-r9
r10-r11
r12-r13
r14-r15
The D10V also has predefined symbols for these control registers and status bits:
psw
bpsw
pc
bpc
rpt_c
rpt_s
rpt_e
mod_s
mod_e
iba
f0
f1
c
as understands the following addressing modes for the D10V.
Rn in the following refers to any of the numbered
registers, but not the control registers.
Rn
@Rn
@Rn+
@Rn-
@-SP
@(disp, Rn)
addr
#imm
# is optional and ignored)
Any symbol followed by @word will be replaced by the symbol's value
shifted right by 2. This is used in situations such as loading a register
with the address of a function (or any other code fragment). For example, if
you want to load a register with the location of the function main then
jump to that function, you could do it as follws:
ldi r2, main@word jmp r2
The D10V has no hardware floating point, but the .float and .double
directives generates IEEE floating-point numbers for compatibility
with other development tools.
For detailed information on the D10V machine instruction set, see
D10V Architecture: A VLIW Microprocessor for Multimedia Applications
(Mitsubishi Electric Corp.).
as implements all the standard D10V opcodes. The only changes are those
described in the section on size modifiers
The Mitsubishi D30V version of as has a few machine
dependent options.
-O
as will attempt to optimize its output by detecting when
instructions can be executed in parallel.
-n
as will issue a warning every
time it adds a nop instruction.
-N
as will issue a warning if it
needs to insert a nop after a 32-bit multiply before a load or 16-bit
multiply instruction.
The D30V syntax is based on the syntax in Mitsubishi's D30V architecture manual. The differences are detailed below.
The D30V version of as uses the instruction names in the D30V
Architecture Manual. However, the names in the manual are sometimes ambiguous.
There are instruction names that can assemble to a short or long form opcode.
How does the assembler pick the correct form? as will always pick the
smallest form if it can. When dealing with a symbol that is not defined yet when a
line is being assembled, it will always use the long form. If you need to force the
assembler to use either the short or long form of the instruction, you can append
either .s (short) or .l (long) to it. For example, if you are writing
an assembly program and you want to do a branch to a symbol that is defined later
in your program, you can write bra.s foo.
Objdump and GDB will always append .s or .l to instructions which
have both short and long forms.
The D30V assembler takes as input a series of instructions, either one-per-line, or in the special two-per-line format described in the next section. Some of these instructions will be short-form or sub-instructions. These sub-instructions can be packed into a single instruction. The assembler will do this automatically. It will also detect when it should not pack instructions. For example, when a label is defined, the next instruction will never be packaged with the previous one. Whenever a branch and link instruction is called, it will not be packaged with the next instruction so the return address will be valid. Nops are automatically inserted when necessary.
If you do not want the assembler automatically making these decisions, you can control the packaging and execution type (parallel or sequential) with the special execution symbols described in the next section.
; and # are the line comment characters.
Sub-instructions may be executed in order, in reverse-order, or in parallel.
Instructions listed in the standard one-per-line format will be executed
sequentially unless you use the -O option.
To specify the executing order, use the following symbols:
->
<-
||
The D30V syntax allows either one instruction per line, one instruction per line with the execution symbol, or two instructions per line. For example
abs r2,r3 -> abs r4,r5
abs r2,r3 <- abs r4,r5
abs r2,r3 || abs r4,r5
ldw r2,@(r3,r4) ||
mulx r6,r8,r9
mulx a0,r8,r9
stw r2,@(r3,r4)
-O option is
used. If the -O option is used, the assembler will determine if
the instructions could be done in parallel (the above two instructions
can be done in parallel), and if so, emit them as parallel instructions.
The assembler will put them in the proper containers. In the above
example, the assembler will put the stw instruction in left
container and the mulx instruction in the right container.
stw r2,@(r3,r4) ->
mulx a0,r8,r9
stw instruction followed by the
mulx instruction sequentially. The first instruction goes in the
left container and the second instruction goes into right container.
The assembler will give an error if the machine ordering constraints are
violated.
stw r2,@(r3,r4) <-
mulx a0,r8,r9
mulx instruction is
executed before the stw instruction.
Since $ has no special meaning, you may use it in symbol names.
as supports the full range of guarded execution
directives for each instruction. Just append the directive after the
instruction proper. The directives are:
/tx
/fx
/xt
/xf
/tt
/tf
You can use the predefined symbols r0 through r63 to refer
to the D30V registers. You can also use sp as an alias for
r63 and link as an alias for r62. The accumulators
are a0 and a1.
The D30V also has predefined symbols for these control registers and status bits:
psw
bpsw
pc
bpc
rpt_c
rpt_s
rpt_e
mod_s
mod_e
iba
f0
f1
f2
f3
f4
f5
f6
f7
s
v
va
c
b
as understands the following addressing modes for the D30V.
Rn in the following refers to any of the numbered
registers, but not the control registers.
Rn
@Rn
@Rn+
@Rn-
@-SP
@(disp, Rn)
addr
#imm
# is optional and ignored)
The D30V has no hardware floating point, but the .float and .double
directives generates IEEE floating-point numbers for compatibility
with other development tools.
For detailed information on the D30V machine instruction set, see
D30V Architecture: A VLIW Microprocessor for Multimedia Applications
(Mitsubishi Electric Corp.).
as implements all the standard D30V opcodes. The only changes are those
described in the section on size modifiers
as has no additional command-line options for the Hitachi
H8/300 family.
; is the line comment character.
$ can be used instead of a newline to separate statements.
Therefore you may not use $ in symbol names on the H8/300.
You can use predefined symbols of the form rnh and
rnl to refer to the H8/300 registers as sixteen 8-bit
general-purpose registers. n is a digit from 0 to
7); for instance, both r0h and r7l are valid
register names.
You can also use the eight predefined symbols rn to refer
to the H8/300 registers as 16-bit registers (you must use this form for
addressing).
On the H8/300H, you can also use the eight predefined symbols
ern (er0 ... er7) to refer to the 32-bit
general purpose registers.
The two control registers are called pc (program counter; a
16-bit register, except on the H8/300H where it is 24 bits) and
ccr (condition code register; an 8-bit register). r7 is
used as the stack pointer, and can also be called sp.
rn
@rn
@(d, rn)
@(d:16, rn)
@(d:24, rn)
@rn+
@-rn
@aa@aa:8@aa:16@aa:24aa. (The address size :24 only makes
sense on the H8/300H.)
#xx
#xx:8
#xx:16
#xx:32
:8, :16, or
:32 for clarity, if you wish; but as neither
requires this nor uses it--the data size required is taken from
context.
@@aa@@aa:8:8 for clarity, if you
wish; but as neither requires this nor uses it.
The H8/300 family has no hardware floating point, but the .float
directive generates IEEE floating-point numbers for compatibility
with other development tools.
as has only one machine-dependent directive for the
H8/300:
.h8300h
.int emit 32-bit numbers rather than the usual (16-bit)
for the H8/300 family.
On the H8/300 family (including the H8/300H) .word directives
generate 16-bit numbers.
For detailed information on the H8/300 machine instruction set, see H8/300 Series Programming Manual (Hitachi ADE-602-025). For information specific to the H8/300H, see H8/300H Series Programming Manual (Hitachi).
as implements all the standard H8/300 opcodes. No additional
pseudo-instructions are needed on this family.
Four H8/300 instructions (add, cmp, mov,
sub) are defined with variants using the suffixes .b,
.w, and .l to specify the size of a memory operand.
as supports these suffixes, but does not require them;
since one of the operands is always a register, as can
deduce the correct size.
For example, since r0 refers to a 16-bit register,
mov r0,@foo
is equivalent to
mov.w r0,@foo
If you use the size suffixes, as issues a warning when
the suffix and the register size do not match.
as has no additional command-line options for the Hitachi
H8/500 family.
! is the line comment character.
; can be used instead of a newline to separate statements.
Since $ has no special meaning, you may use it in symbol names.
You can use the predefined symbols r0, r1, r2,
r3, r4, r5, r6, and r7 to refer to
the H8/500 registers.
The H8/500 also has these control registers:
cp
dp
bp
tp
ep
sr
ccr
All registers are 16 bits long. To represent 32 bit numbers, use two
adjacent registers; for distant memory addresses, use one of the segment
pointers (cp for the program counter; dp for
r0-r3; ep for r4 and r5; and
tp for r6 and r7.
Rn
@Rn
@(d:8, Rn)
@(d:16, Rn)
@-Rn
@Rn+
@aa:8
@aa:16
#xx:8
#xx:16
The H8/500 family has no hardware floating point, but the .float
directive generates IEEE floating-point numbers for compatibility
with other development tools.
as has no machine-dependent directives for the H8/500.
However, on this platform the .int and .word directives
generate 16-bit numbers.
For detailed information on the H8/500 machine instruction set, see H8/500 Series Programming Manual (Hitachi M21T001).
as implements all the standard H8/500 opcodes. No additional
pseudo-instructions are needed on this family.
As a back end for GNU CC as has been throughly tested and should
work extremely well. We have tested it only minimally on hand written assembly
code and no one has tested it much on the assembly output from the HP
compilers.
The format of the debugging sections has changed since the original
as port (version 1.3X) was released; therefore,
you must rebuild all HPPA objects and libraries with the new
assembler so that you can debug the final executable.
The HPPA as port generates a small subset of the relocations
available in the SOM and ELF object file formats. Additional relocation
support will be added as it becomes necessary.
as has no machine-dependent command-line options for the HPPA.
The assembler syntax closely follows the HPPA instruction set reference manual; assembler directives and general syntax closely follow the HPPA assembly language reference manual, with a few noteworthy differences.
First, a colon may immediately follow a label definition. This is simply for compatibility with how most assembly language programmers write code.
Some obscure expression parsing problems may affect hand written code which
uses the spop instructions, or code which makes significant
use of the ! line separator.
as is much less forgiving about missing arguments and other
similar oversights than the HP assembler. as notifies you
of missing arguments as syntax errors; this is regarded as a feature, not a
bug.
Finally, as allows you to use an external symbol without
explicitly importing the symbol. Warning: in the future this will be
an error for HPPA targets.
Special characters for HPPA targets include:
; is the line comment character.
! can be used instead of a newline to separate statements.
Since $ has no special meaning, you may use it in symbol names.
The HPPA family uses IEEE floating-point numbers.
as for the HPPA supports many additional directives for
compatibility with the native assembler. This section describes them only
briefly. For detailed information on HPPA-specific assembler directives, see
HP9000 Series 800 Assembly Language Reference Manual (HP 92432-90001).
as does not support the following assembler directives
described in the HP manual:
.endm .liston .enter .locct .leave .macro .listoff
Beyond those implemented for compatibility, as supports one
additional assembler directive for the HPPA: .param. It conveys
register argument locations for static functions. Its syntax closely follows
the .export directive.
These are the additional directives in as for the HPPA:
.block n
.blockz n
.call
.callinfo [ param=value, ... ] [ flag, ... ]
param may be any of frame (frame size), entry_gr (end of
general register range), entry_fr (end of float register range),
entry_sr (end of space register range).
The values for flag are calls or caller (proc has
subroutines), no_calls (proc does not call subroutines), save_rp
(preserve return pointer), save_sp (proc preserves stack pointer),
no_unwind (do not unwind this proc), hpux_int (proc is interrupt
routine).
.code
$TEXT$, subsection
$CODE$.
.copyright "string"
.copyright "string"
.enter
.entry
.exit
.export name [ ,typ ] [ ,param=r ]
absolute, code (ELF only, not SOM), data,
entry, data, entry, millicode, plabel,
pri_prog, or sec_prog.
param, if present, provides either relocation information for the
procedure arguments and result, or a privilege level. param may be
argwn (where n ranges from 0 to 3, and
indicates one of four one-word arguments); rtnval (the procedure's
result); or priv_lev (privilege level). For arguments or the result,
r specifies how to relocate, and must be one of no (not
relocatable), gr (argument is in general register), fr (in
floating point register), or fu (upper half of float register).
For priv_lev, r is an integer.
.half n
as directive .short.
.import name [ ,typ ]
.export; make a procedure available to call. The arguments
use the same conventions as the first two arguments for .export.
.label name
.leave
.origin lc
{No value for `as'}
portable directive .org.
.param name [ ,typ ] [ ,param=r ]
.export, but used for static procedures.
.proc
.procend
label .reg expr
.equ; define label with the absolute expression
expr as its value.
.space secname [ ,params ]
If specified, the list params declares attributes of the section,
identified by keywords. The keywords recognized are spnum=exp
(identify this section by the number exp, an absolute expression),
sort=exp (order sections according to this sort key when linking;
exp is an absolute expression), unloadable (section contains no
loadable data), notdefined (this section defined elsewhere), and
private (data in this section not available to other programs).
.spnum secnam
.space directive.)
.string "str"
as strings.
Warning! The HPPA version of .string differs from the
usual as definition: it does not write a zero byte
after copying str.
.stringz "str"
.string, but appends a zero byte after copying str to object
file.
.subspa name [ ,params ]
.nsubspa name [ ,params ]
.space, but selects a subsection name within the
current section. You may only specify params when you create a
subsection (in the first instance of .subspa for this name).
If specified, the list params declares attributes of the subsection,
identified by keywords. The keywords recognized are quad=expr
("quadrant" for this subsection), align=expr (alignment for
beginning of this subsection; a power of two), access=expr (value
for "access rights" field), sort=expr (sorting order for this
subspace in link), code_only (subsection contains only code),
unloadable (subsection cannot be loaded into memory), common
(subsection is common block), dup_comm (initialized data may have
duplicate names), or zero (subsection is all zeros, do not write in
object file).
.nsubspa always creates a new subspace with the given name, even
if one with the same name already exists.
.version "str"
For detailed information on the HPPA machine instruction set, see PA-RISC Architecture and Instruction Set Reference Manual (HP 09740-90039).
The ESA/390 as port is currently intended to be a back-end
for the GNU CC compiler. It is not HLASM compatible, although
it does support a subset of some of the HLASM directives. The only
supported binary file format is ELF; none of the usual MVS/VM/OE/USS
object file formats, such as ESD or XSD, are supported.
When used with the GNU CC compiler, the ESA/390 as
will produce correct, fully relocated, functional binaries, and has been
used to compile and execute large projects. However, many aspects should
still be considered experimental; these include shared library support,
dynamically loadable objects, and any relocation other than the 31-bit
relocation.
as has no machine-dependent command-line options for the ESA/390.
The opcode/operand syntax follows the ESA/390 Principles of Operation manual; assembler directives and general syntax are loosely based on the prevailing AT&T/SVR4/ELF/Solaris style notation. HLASM-style directives are not supported for the most part, with the exception of those described herein.
A leading dot in front of directives is optional, and the case of directives is ignored; thus for example, .using and USING have the same effect.
A colon may immediately follow a label definition. This is simply for compatibility with how most assembly language programmers write code.
# is the line comment character.
; can be used instead of a newline to separate statements.
Since $ has no special meaning, you may use it in symbol names.
Registers can be given the symbolic names r0..r15, fp0, fp2, fp4, fp6.
By using thesse symbolic names, as can detect simple
syntax errors. The name rarg or r.arg is a synonym for r11, rtca or r.tca
for r12, sp, r.sp, dsa r.dsa for r13, lr or r.lr for r14, rbase or r.base
for r3 and rpgt or r.pgt for r4.
* is the current location counter. Unlike . it is always
relative to the last USING directive. Note that this means that
expressions cannot use multiplication, as any occurence of *
will be interpreted as a location counter.
All labels are relative to the last USING. Thus, branches to a label always imply the use of base+displacement.
Many of the usual forms of address constants / address literals
are supported. Thus,
.using *,r3 L r15,=A(some_routine) LM r6,r7,=V(some_longlong_extern) A r1,=F'12' AH r0,=H'42' ME r6,=E'3.1416' MD r6,=D'3.14159265358979' O r6,=XL4'cacad0d0' .ltorgshould all behave as expected: that is, an entry in the literal pool will be created (or reused if it already exists), and the instruction operands will be the displacement into the literal pool using the current base register (as last declared with the
.using
directive).
The assembler generates only IEEE floating-point numbers. The older floiating point formats are not supported.
as for the ESA/390 supports all of the standard ELF/SVR4
assembler directives that are documented in the main part of this
documentation. Several additional directives are supported in order
to implement the ESA/390 addressing model. The most important of these
are .using and .ltorg
These are the additional directives in as for the ESA/390:
.dc
.drop regno
.using directive in the
same section as the current section.
.ebcdic string
.string etc. emit
ascii strings by default.
EQU
as directive .equ can be used to the same effect.
.ltorg
.using must have been previously
specified in the same section.
.using expr,regno
*.
This assembler allows two .using directives to be simultaneously
outstanding, one in the .text section, and one in another section
(typically, the .data section). This feature allows
dynamically loaded objects to be implemented in a relatively
straightforward way. A .using directive must always be specified
in the .text section; this will specify the base register that
will be used for branches in the .text section. A second
.using may be specified in another section; this will specify
the base register that is used for non-label address literals.
When a second .using is specified, then the subsequent
.ltorg must be put in the same section; otherwise an error will
result.
Thus, for example, the following code uses r3 to address branch
targets and r4 to address the literal pool, which has been written
to the .data section. The is, the constants =A(some_routine),
=H'42' and =E'3.1416' will all appear in the .data
section.
.data
.using LITPOOL,r4
.text
BASR r3,0
.using *,r3
B START
.long LITPOOL
START:
L r4,4(,r3)
L r15,=A(some_routine)
LTR r15,r15
BNE LABEL
AH r0,=H'42'
LABEL:
ME r6,=E'3.1416'
.data
LITPOOL:
.ltorg
Note that this dual-.using directive semantics extends
and is not compatible with HLASM semantics. Note that this assembler
directive does not support the full range of HLASM semantics.
For detailed information on the ESA/390 machine instruction set, see ESA/390 Principles of Operation (IBM Publication Number DZ9AR004).
The i386 version as supports both the original Intel 386
architecture in both 16 and 32-bit mode as well as AMD x86-64 architecture
extending the Intel architecture to 64-bits.
The i386 version of as has a few machine
dependent options:
--32 | --64
These options are only available with the ELF object file format, and require that the necessary BFD support has been included (on a 32-bit platform you have to add -enable-64-bit-bfd to configure enable 64-bit usage and use x86-64 as target platform).
as now supports assembly using Intel assembler syntax.
.intel_syntax selects Intel mode, and .att_syntax switches
back to the usual AT&T mode for compatibility with the output of
gcc. Either of these directives may have an optional
argument, prefix, or noprefix specifying whether registers
require a % prefix. AT&T System V/386 assembler syntax is quite
different from Intel syntax. We mention these differences because
almost all 80386 documents use Intel syntax. Notable differences
between the two syntaxes are:
$; Intel immediate
operands are undelimited (Intel push 4 is AT&T pushl $4).
AT&T register operands are preceded by %; Intel register operands
are undelimited. AT&T absolute (as opposed to PC relative) jump/call
operands are prefixed by *; they are undelimited in Intel syntax.
add eax, 4 is addl $4, %eax. The
source, dest convention is maintained for compatibility with
previous Unix assemblers. Note that instructions with more than one
source operand, such as the enter instruction, do not have
reversed order. i386-Bugs.
b,
w, l and q specify byte (8-bit), word (16-bit), long
(32-bit) and quadruple word (64-bit) memory references. Intel syntax accomplishes
this by prefixing memory operands (not the instruction mnemonics) with
byte ptr, word ptr, dword ptr and qword ptr. Thus,
Intel mov al, byte ptr foo is movb foo, %al in AT&T
syntax.
lcall/ljmp $section, $offset in AT&T syntax; the
Intel syntax is
call/jmp far section:offset. Also, the far return
instruction
is lret $stack-adjust in AT&T syntax; Intel syntax is
ret far stack-adjust.
Instruction mnemonics are suffixed with one character modifiers which
specify the size of operands. The letters b, w, l
and q specify byte, word, long and quadruple word operands. If
no suffix is specified by an instruction then as tries to
fill in the missing suffix based on the destination register operand
(the last one by convention). Thus, mov %ax, %bx is equivalent
to movw %ax, %bx; also, mov $1, %bx is equivalent to
movw $1, bx. Note that this is incompatible with the AT&T Unix
assembler which assumes that a missing mnemonic suffix implies long
operand size. (This incompatibility does not affect compiler output
since compilers always explicitly specify the mnemonic suffix.)
Almost all instructions have the same names in AT&T and Intel format.
There are a few exceptions. The sign extend and zero extend
instructions need two sizes to specify them. They need a size to
sign/zero extend from and a size to zero extend to. This
is accomplished by using two instruction mnemonic suffixes in AT&T
syntax. Base names for sign extend and zero extend are
movs... and movz... in AT&T syntax (movsx
and movzx in Intel syntax). The instruction mnemonic suffixes
are tacked on to this base name, the from suffix before the
to suffix. Thus, movsbl %al, %edx is AT&T syntax for
"move sign extend from %al to %edx." Possible suffixes,
thus, are bl (from byte to long), bw (from byte to word),
wl (from word to long), bq (from byte to quadruple word),
wq (from word to quadruple word), and lq (from long to
quadruple word).
The Intel-syntax conversion instructions
cbw -- sign-extend byte in %al to word in %ax,
cwde -- sign-extend word in %ax to long in %eax,
cwd -- sign-extend word in %ax to long in %dx:%ax,
cdq -- sign-extend dword in %eax to quad in %edx:%eax,
cdqe -- sign-extend dword in %eax to quad in %rax
(x86-64 only),
cdo -- sign-extend quad in %rax to octuple in
%rdx:%rax (x86-64 only),
are called cbtw, cwtl, cwtd, cltd, cltq, and
cqto in AT&T naming. as accepts either naming for these
instructions.
Far call/jump instructions are lcall and ljmp in
AT&T syntax, but are call far and jump far in Intel
convention.
Register operands are always prefixed with %. The 80386 registers
consist of
%eax (the accumulator), %ebx,
%ecx, %edx, %edi, %esi, %ebp (the
frame pointer), and %esp (the stack pointer).
%ax, %bx, %cx,
%dx, %di, %si, %bp, and %sp.
%ah, %al, %bh,
%bl, %ch, %cl, %dh, and %dl (These
are the high-bytes and low-bytes of %ax, %bx,
%cx, and %dx)
%cs (code section), %ds
(data section), %ss (stack section), %es, %fs,
and %gs.
%cr0, %cr2, and
%cr3.
%db0, %db1, %db2,
%db3, %db6, and %db7.
%tr6 and %tr7.
%st or equivalently
%st(0), %st(1), %st(2), %st(3),
%st(4), %st(5), %st(6), and %st(7).
These registers are overloaded by 8 MMX registers %mm0,
%mm1, %mm2, %mm3, %mm4, %mm5,
%mm6 and %mm7.
%xmm0, %xmm1, %xmm2,
%xmm3, %xmm4, %xmm5, %xmm6 and %xmm7.
The AMD x86-64 architecture extends the register set by:
%rax (the
accumulator), %rbx, %rcx, %rdx, %rdi,
%rsi, %rbp (the frame pointer), %rsp (the stack
pointer)
%r8-%r15.
%r8d-%r15d
%r8w-%r15w
%r8b-%r15b
%sil, %dil, %bpl, %spl.
%db8-%db15.
%xmm8-%xmm15.
Instruction prefixes are used to modify the following instruction. They
are used to repeat string instructions, to provide section overrides, to
perform bus lock operations, and to change operand and address sizes.
(Most instructions that normally operate on 32-bit operands will use
16-bit operands if the instruction has an "operand size" prefix.)
Instruction prefixes are best written on the same line as the instruction
they act upon. For example, the scas (scan string) instruction is
repeated with:
repne scas %es:(%edi),%al
You may also place prefixes on the lines immediately preceding the
instruction, but this circumvents checks that as does
with prefixes, and will not work with all prefixes.
Here is a list of instruction prefixes:
cs, ds, ss, es,
fs, gs. These are automatically added by specifying
using the section:memory-operand form for memory references.
data16 and addr16
change 32-bit operands/addresses into 16-bit operands/addresses,
while data32 and addr32 change 16-bit ones (in a
.code16 section) into 32-bit operands/addresses. These prefixes
must appear on the same line of code as the instruction they
modify. For example, in a 16-bit .code16 section, you might
write:
addr32 jmpl *(%ebx)
lock inhibits interrupts during execution of
the instruction it precedes. (This is only valid with certain
instructions; see a 80386 manual for details).
wait waits for the coprocessor to
complete the current instruction. This should never be needed for the
80386/80387 combination.
rep, repe, and repne prefixes are added
to string instructions to make them repeat %ecx times (%cx
times if the current address size is 16-bits).
rex family of prefixes is used by x86-64 to encode
extensions to i386 instruction set. The rex prefix has four
bits -- an operand size overwrite (64) used to change operand size
from 32-bit to 64-bit and X, Y and Z extensions bits used to extend the
register set.
You may write the rex prefixes directly. The rex64xyz
instruction emits rex prefix with all the bits set. By omitting
the 64, x, y or z you may write other
prefixes as well. Normally, there is no need to write the prefixes
explicitly, since gas will automatically generate them based on the
instruction operands.
An Intel syntax indirect memory reference of the form
section:[base + index*scale + disp]
is translated into the AT&T syntax
section:disp(base, index, scale)
where base and index are the optional 32-bit base and
index registers, disp is the optional displacement, and
scale, taking the values 1, 2, 4, and 8, multiplies index
to calculate the address of the operand. If no scale is
specified, scale is taken to be 1. section specifies the
optional section register for the memory operand, and may override the
default section register (see a 80386 manual for section register
defaults). Note that section overrides in AT&T syntax must
be preceded by a %. If you specify a section override which
coincides with the default section register, as does not
output any section register override prefixes to assemble the given
instruction. Thus, section overrides can be specified to emphasize which
section register is used for a given memory operand.
Here are some examples of Intel and AT&T style memory references:
-4(%ebp), Intel: [ebp - 4]
%ebp; disp is -4. section is
missing, and the default section is used (%ss for addressing with
%ebp as the base register). index, scale are both missing.
foo(,%eax,4), Intel: [foo + eax*4]
%eax (scaled by a scale 4); disp is
foo. All other fields are missing. The section register here
defaults to %ds.
foo(,1); Intel [foo]
foo as a memory operand.
Note that base and index are both missing, but there is only
one ,. This is a syntactic exception.
%gs:foo; Intel gs:foo
foo with section
register section being %gs.
Absolute (as opposed to PC relative) call and jump operands must be
prefixed with *. If no * is specified, as
always chooses PC relative addressing for jump/call labels.
Any instruction that has a memory operand, but no register operand,
must specify its size (byte, word, long, or quadruple) with an
instruction mnemonic suffix (b, w, l or q,
respectively).
The x86-64 architecture adds an RIP (instruction pointer relative)
addressing. This addressing mode is specified by using rip as a
base register. Only constant offsets are valid. For example:
1234(%rip), Intel: [rip + 1234]
symbol(%rip), Intel: [rip + symbol]
symbol in RIP relative way, this is shorter than
the default absolute addressing.
Other addressing modes remain unchanged in x86-64 architecture, except registers used are 64-bit instead of 32-bit.
Jump instructions are always optimized to use the smallest possible
displacements. This is accomplished by using byte (8-bit) displacement
jumps whenever the target is sufficiently close. If a byte displacement
is insufficient a long displacement is used. We do not support
word (16-bit) displacement jumps in 32-bit mode (i.e. prefixing the jump
instruction with the data16 instruction prefix), since the 80386
insists upon masking %eip to 16 bits after the word displacement
is added. (See also see i386-Arch)
Note that the jcxz, jecxz, loop, loopz,
loope, loopnz and loopne instructions only come in byte
displacements, so that if you use these instructions (gcc does
not use them) you may get an error message (and incorrect code). The AT&T
80386 assembler tries to get around this problem by expanding jcxz foo
to
jcxz cx_zero
jmp cx_nonzero
cx_zero: jmp foo
cx_nonzero:
All 80387 floating point types except packed BCD are supported. (BCD support may be added without much difficulty). These data types are 16-, 32-, and 64- bit integers, and single (32-bit), double (64-bit), and extended (80-bit) precision floating point. Each supported type has an instruction mnemonic suffix and a constructor associated with it. Instruction mnemonic suffixes specify the operand's data type. Constructors build these data types into memory.
.float or .single,
.double, and .tfloat for 32-, 64-, and 80-bit formats.
These correspond to instruction mnemonic suffixes s, l,
and t. t stands for 80-bit (ten byte) real. The 80387
only supports this format via the fldt (load 80-bit real to stack
top) and fstpt (store 80-bit real and pop stack) instructions.
.word, .long or .int, and
.quad for the 16-, 32-, and 64-bit integer formats. The
corresponding instruction mnemonic suffixes are s (single),
l (long), and q (quad). As with the 80-bit real format,
the 64-bit q format is only present in the fildq (load
quad integer to stack top) and fistpq (store quad integer and pop
stack) instructions.
Register to register operations should not use instruction mnemonic suffixes.
fstl %st, %st(1) will give a warning, and be assembled as if you
wrote fst %st, %st(1), since all register to register operations
use 80-bit floating point operands. (Contrast this with fstl %st, mem,
which converts %st from 80-bit to 64-bit floating point format,
then stores the result in the 4 byte location mem)
as supports Intel's MMX instruction set (SIMD
instructions for integer data), available on Intel's Pentium MMX
processors and Pentium II processors, AMD's K6 and K6-2 processors,
Cyrix' M2 processor, and probably others. It also supports AMD's 3DNow!
instruction set (SIMD instructions for 32-bit floating point data)
available on AMD's K6-2 processor and possibly others in the future.
Currently, as does not support Intel's floating point
SIMD, Katmai (KNI).
The eight 64-bit MMX operands, also used by 3DNow!, are called %mm0,
%mm1, ... %mm7. They contain eight 8-bit integers, four
16-bit integers, two 32-bit integers, one 64-bit integer, or two 32-bit
floating point values. The MMX registers cannot be used at the same time
as the floating point stack.
See Intel and AMD documentation, keeping in mind that the operand order in instructions is reversed from the Intel syntax.
While as normally writes only "pure" 32-bit i386 code
or 64-bit x86-64 code depending on the default configuration,
it also supports writing code to run in real mode or in 16-bit protected
mode code segments. To do this, put a .code16 or
.code16gcc directive before the assembly language instructions to
be run in 16-bit mode. You can switch as back to writing
normal 32-bit code with the .code32 directive.
.code16gcc provides experimental support for generating 16-bit
code from gcc, and differs from .code16 in that call,
ret, enter, leave, push, pop,
pusha, popa, pushf, and popf instructions
default to 32-bit size. This is so that the stack pointer is
manipulated in the same way over function calls, allowing access to
function parameters at the same stack offsets as in 32-bit mode.
.code16gcc also automatically adds address size prefixes where
necessary to use the 32-bit addressing modes that gcc generates.
The code which as generates in 16-bit mode will not
necessarily run on a 16-bit pre-80386 processor. To write code that
runs on such a processor, you must refrain from using any 32-bit
constructs which require as to output address or operand
size prefixes.
Note that writing 16-bit code instructions by explicitly specifying a
prefix or an instruction mnemonic suffix within a 32-bit code section
generates different machine instructions than those generated for a
16-bit code segment. In a 32-bit code section, the following code
generates the machine opcode bytes 66 6a 04, which pushes the
value 4 onto the stack, decrementing %esp by 2.
pushw $4
The same code in a 16-bit code section would generate the machine
opcode bytes 6a 04 (ie. without the operand size prefix), which
is correct since the processor default operand size is assumed to be 16
bits in a 16-bit code section.
The UnixWare assembler, and probably other AT&T derived ix86 Unix assemblers, generate floating point instructions with reversed source and destination registers in certain cases. Unfortunately, gcc and possibly many other programs use this reversed syntax, so we're stuck with it.
For example
fsub %st,%st(3)
results in %st(3) being updated to %st - %st(3) rather
than the expected %st(3) - %st. This happens with all the
non-commutative arithmetic floating point operations with two register
operands where the source register is %st and the destination
register is %st(i).
as may be told to assemble for a particular CPU
architecture with the .arch cpu_type directive. This
directive enables a warning when gas detects an instruction that is not
supported on the CPU specified. The choices for cpu_type are:
i8086 | i186 | i286 | i386
|
i486 | i586 | i686 | pentium
|
pentiumpro | pentium4 | k6 | athlon
|
sledgehammer
|
Apart from the warning, there are only two other effects on
as operation; Firstly, if you specify a CPU other than
i486, then shift by one instructions such as sarl $1, %eax
will automatically use a two byte opcode sequence. The larger three
byte opcode sequence is used on the 486 (and when no architecture is
specified) because it executes faster on the 486. Note that you can
explicitly request the two byte opcode by writing sarl %eax.
Secondly, if you specify i8086, i186, or i286,
and .code16 or .code16gcc then byte offset
conditional jumps will be promoted when necessary to a two instruction
sequence consisting of a conditional jump of the opposite sense around
an unconditional jump to the target.
Following the CPU architecture, you may specify jumps or
nojumps to control automatic promotion of conditional jumps.
jumps is the default, and enables jump promotion; All external
jumps will be of the long variety, and file-local jumps will be promoted
as necessary. (see i386-Jumps) nojumps leaves external
conditional jumps as byte offset jumps, and warns about file-local
conditional jumps that as promotes.
Unconditional jumps are treated as for jumps.
For example
.arch i8086,nojumps
There is some trickery concerning the mul and imul
instructions that deserves mention. The 16-, 32-, 64- and 128-bit expanding
multiplies (base opcode 0xf6; extension 4 for mul and 5
for imul) can be output only in the one operand form. Thus,
imul %ebx, %eax does not select the expanding multiply;
the expanding multiply would clobber the %edx register, and this
would confuse gcc output. Use imul %ebx to get the
64-bit product in %edx:%eax.
We have added a two operand form of imul when the first operand
is an immediate mode expression and the second operand is a register.
This is just a shorthand, so that, multiplying %eax by 69, for
example, can be done with imul $69, %eax rather than imul
$69, %eax, %eax.
This is a fairly complete i860 assembler which is compatible with the
UNIX System V/860 Release 4 assembler. However, it does not currently
support SVR4 PIC (i.e., @GOT, @GOTOFF, @PLT).
Like the SVR4/860 assembler, the output object format is ELF32. Currently, this is the only supported object format. If there is sufficient interest, other formats such as COFF may be implemented.
-V
-Qy
-Qn
-EL
-EB
-mwarn-expand
or instruction with an immediate larger than 16-bits
will be expanded into two instructions. This is a very undesirable feature to
rely on, so this flag can help detect any code where it happens. One
use of it, for instance, has been to find and eliminate any place
where gcc may emit these pseudo-instructions.
.dual
d. prefix.
.enddual
d. prefix.
.atmp
r31.
All of the Intel i860 machine instructions are supported. Please see either i860 Microprocessor Programmer's Reference Manual or i860 Microprocessor Architecture for more information.
For compatibility with some other i860 assemblers, a number of pseudo-instructions are supported. While these are supported, they are a very undesirable feature that should be avoided - in particular, when they result in an expansion to multiple actual i860 instructions. Below are the pseudo-instructions that result in expansions.
The pseudo-instruction mov imm,%rn (where the immediate does
not fit within a signed 16-bit field) will be expanded into:
orh large_imm@h,%r0,%rn or large_imm@l,%rn,%rn
For example, the pseudo-instruction ld.b addr,%rn
will be expanded into:
orh addr_exp@ha,%r0,%r31 ld.l addr_exp@l(%r31),%rn
The analogous expansions apply to ld.x, st.x, fld.x, pfld.x, fst.x, and pst.x as well.
If any of the arithmetic operations adds, addu, subs, subu are used
with an immediate larger than 16-bits (signed), then they will be expanded.
For instance, the pseudo-instruction adds large_imm,%rx,%rn expands to:
orh large_imm@h,%r0,%r31 or large_imm@l,%r31,%r31 adds %r31,%rx,%rn
Logical operations (or, andnot, or, xor) also result in expansions.
The pseudo-instruction or large_imm,%rx,%rn results in:
orh large_imm@h,%rx,%r31 or large_imm@l,%r31,%rn
Similarly for the others, except for and which expands to:
andnot (-1 - large_imm)@h,%rx,%r31 andnot (-1 - large_imm)@l,%r31,%rn
-ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC
-ACA is equivalent to -ACA_A; -AKC is equivalent to
-AMC. Synonyms are provided for compatibility with other tools.
If you do not specify any of these options, as generates code
for any instruction or feature that is supported by some version of the
960 (even if this means mixing architectures!). In principle,
as attempts to deduce the minimal sufficient processor type if
none is specified; depending on the object code format, the processor type may
be recorded in the object file. If it is critical that the as
output match a specific architecture, specify that architecture explicitly.
-b
-b is specified:
call increment routine
.word 0 # pre-counter
Label: BR
call increment routine
.word 0 # post-counter
The counter following a branch records the number of times that branch was not taken; the differenc between the two counters is the number of times the branch was taken.
A table of every such Label is also generated, so that the
external postprocessor gbr960 (supplied by Intel) can locate all
the counters. This table is always labelled __BRANCH_TABLE__;
this is a local symbol to permit collecting statistics for many separate
object files. The table is word aligned, and begins with a two-word
header. The first word, initialized to 0, is used in maintaining linked
lists of branch tables. The second word is a count of the number of
entries in the table, which follow immediately: each is a word, pointing
to one of the labels illustrated above.
The first word of the header is used to locate multiple branch tables,
since each object file may contain one. Normally the links are
maintained with a call to an initialization routine, placed at the
beginning of each function in the file. The GNU C compiler
generates these calls automatically when you give it a -b option.
For further details, see the documentation of gbr960.
-no-relax
chkbit) and branch
instructions. You can use the -no-relax option to specify that
as should generate errors instead, if the target displacement
is larger than 13 bits.
This option does not affect the Compare-and-Jump instructions; the code
emitted for them is always adjusted when necessary (depending on
displacement size), regardless of whether you use -no-relax.
as generates IEEE floating-point numbers for the directives
.float, .double, .extended, and .single.
.bss symbol, length, align
.lcomm only in that it permits you to specify
an alignment. See .lcomm.
.extended flonums
.extended expects zero or more flonums, separated by commas; for
each flonum, .extended emits an IEEE extended-format (80-bit)
floating-point number.
.leafproc call-lab, bal-lab
.leafproc directive in conjunction with the
optimized callj instruction to enable faster calls of leaf
procedures. If a procedure is known to call no other procedures, you
may define an entry point that skips procedure prolog code (and that does
not depend on system-supplied saved context), and declare it as the
bal-lab using .leafproc. If the procedure also has an
entry point that goes through the normal prolog, you can specify that
entry point as call-lab.
A .leafproc declaration is meant for use in conjunction with the
optimized call instruction callj; the directive records the data
needed later to choose between converting the callj into a
bal or a call.
call-lab is optional; if only one argument is present, or if the
two arguments are identical, the single argument is assumed to be the
bal entry point.
.sysproc name, index
.sysproc directive defines a name for a system procedure.
After you define it using .sysproc, you can use name to
refer to the system procedure identified by index when calling
procedures with the optimized call instruction callj.
Both arguments are required; index must be between 0 and 31 (inclusive).
All Intel 960 machine instructions are supported; see i960 Command-line Options for a discussion of selecting the instruction subset for a particular 960 architecture.
Some opcodes are processed beyond simply emitting a single corresponding
instruction: callj, and Compare-and-Branch or Compare-and-Jump
instructions with target displacements larger than 13 bits.
callj
calljYou can write callj to have the assembler or the linker determine
the most appropriate form of subroutine call: call,
bal, or calls. If the assembly source contains
enough information--a .leafproc or .sysproc directive
defining the operand--then as translates the
callj; if not, it simply emits the callj, leaving it
for the linker to resolve.
The 960 architectures provide combined Compare-and-Branch instructions that permit you to store the branch target in the lower 13 bits of the instruction word itself. However, if you specify a branch target far enough away that its address won't fit in 13 bits, the assembler can either issue an error, or convert your Compare-and-Branch instruction into separate instructions to do the compare and the branch.
Whether as gives an error or expands the instruction depends
on two choices you can make: whether you use the -no-relax option,
and whether you use a "Compare and Branch" instruction or a "Compare
and Jump" instruction. The "Jump" instructions are always
expanded if necessary; the "Branch" instructions are expanded when
necessary unless you specify -no-relax--in which case
as gives an error instead.
These are the Compare-and-Branch instructions, their "Jump" variants, and the instruction pairs they may expand into:
The Mitsubishi M32R version of as has a few machine
dependent options:
-m32rx
as can assemble code for several different members of the
Mitsubishi M32R family. Normally the default is to assemble code for
the M32R microprocessor. This option may be used to change the default
to the M32RX microprocessor, which adds some more instructions to the
basic M32R instruction set, and some additional parameters to some of
the original instructions.
-m32r
-warn-explicit-parallel-conflicts
as to produce warning messages when
questionable parallel instructions are encountered. This option is
enabled by default, but gcc disables it when it invokes
as directly. Questionable instructions are those whoes
behaviour would be different if they were executed sequentially. For
example the code fragment mv r1, r2 || mv r3, r1 produces a
different result from mv r1, r2 \n mv r3, r1 since the former
moves r1 into r3 and then r2 into r1, whereas the later moves r2 into r1
and r3.
-Wp
-no-warn-explicit-parallel-conflicts
as not to produce warning messages when
questionable parallel instructions are encountered.
-Wnp
There are several warning and error messages that can be produced by
as which are specific to the M32R:
output of 1st instruction is the same as an input to 2nd instruction - is this intentional ?
mv r1, r2 || neg r3, r1 register r1 is the destination of the
move instruction and the input to the neg instruction.
output of 2nd instruction is the same as an input to 1st instruction - is this intentional ?
mv r1, r2 || neg r2, r3 register r2 is the destination of the
neg instruction and the input to the move instruction.
instruction ... is for the M32RX only
-m32rx
command line flag has not been specified to allow assembly of such
instructions.
unknown instruction ...
only the NOP instruction can be issued in parallel on the m32r
-m32rx command line flag has not been specified. Only the M32Rx
processor is able to execute two instructions in parallel.
instruction ... cannot be executed in parallel.
Instructions share the same execution pipeline
Instructions write to the same destination register.
mv r1, r2 || neg r1, r3
jl r0 || mv r14, r1
st r2, @-r1 || mv r1, r3
mv r1, r2 || ld r0, @r1+
cmp r1, r2 || addx r3, r4 (Both write to the condition bit)
The Motorola 680x0 version of as has a few machine
dependent options:
-l
-l option to shorten the size of references to undefined
symbols. If you do not use the -l option, references to undefined
symbols are wide enough for a full long (32 bits). (Since
as cannot know where these symbols end up, as can
only allocate space for the linker to fill in later. Since as
does not know how far away these symbols are, it allocates as much space as it
can.) If you use this option, the references are only one word wide (16 bits).
This may be useful if you want the object file to be as small as possible, and
you know that the relevant symbols are always less than 17 bits away.
--register-prefix-optional
% before any use of a register name. This
is intended to let the assembler distinguish between C variables and
functions named a0 through a7, and so on. The % is
always accepted, but is not required for certain configurations, notably
sun3. The --register-prefix-optional option may be used
to permit omitting the % even for configurations for which it is
normally required. If this is done, it will generally be impossible to
refer to C variables and functions with the same names as register
names.
--bitwise-or
| is treated as a comment character, which
means that it can not be used in expressions. The --bitwise-or
option turns | into a normal character. In this mode, you must
either use C style comments, or start comments with a # character
at the beginning of a line.
--base-size-default-16 --base-size-default-32
as will normally use the full 32 bit value.
For example, the addressing mode %a0@(%d0) is equivalent to
%a0@(%d0:l). You may use the --base-size-default-16
option to tell as to default to using the 16 bit value.
In this case, %a0@(%d0) is equivalent to %a0@(%d0:w).
You may use the --base-size-default-32 option to restore the
default behaviour.
--disp-size-default-16 --disp-size-default-32
as will normally assume that
the value is 32 bits. For example, if the symbol disp has not
been defined, as will assemble the addressing mode
%a0@(disp,%d0) as though disp is a 32 bit value. You may
use the --disp-size-default-16 option to tell as
to instead assume that the displacement is 16 bits. In this case,
as will assemble %a0@(disp,%d0) as though
disp is a 16 bit value. You may use the
--disp-size-default-32 option to restore the default behaviour.
--pcrel
as needs a long branch
that is not available, it normally emits an absolute jump instead. This
option disables this substitution. When this option is given and no long
branches are available, only word branches will be emitted. An error
message will be generated if a word branch cannot reach its target. This
option has no effect on 68020 and other processors that have long branches.
see Branch Improvement.
-m68000
as can assemble code for several different members of the
Motorola 680x0 family. The default depends upon how as
was configured when it was built; normally, the default is to assemble
code for the 68020 microprocessor. The following options may be used to
change the default. These options control which instructions and
addressing modes are permitted. The members of the 680x0 family are
very similar. For detailed information about the differences, see the
Motorola manuals.
-m68000
-m68ec000
-m68hc000
-m68hc001
-m68008
-m68302
-m68306
-m68307
-m68322
-m68356
-m68008, -m68302, and so on are synonyms
for -m68000, since the chips are the same from the point of view
of the assembler.
-m68010
-m68020
-m68ec020
-m68030
-m68ec030
-m68040
-m68ec040
-m68060
-m68ec060
-mcpu32
-m68330
-m68331
-m68332
-m68333
-m68334
-m68336
-m68340
-m68341
-m68349
-m68360
-m5200
-m68881
-m68882
-mno-68881
-m68851
-m68851 and -m68040 should not be used
together.
-mno-68851
This syntax for the Motorola 680x0 was developed at MIT.
The 680x0 version of as uses instructions names and
syntax compatible with the Sun assembler. Intervening periods are
ignored; for example, movl is equivalent to mov.l.
In the following table apc stands for any of the address registers
(%a0 through %a7), the program counter (%pc), the
zero-address relative to the program counter (%zpc), a suppressed
address register (%za0 through %za7), or it may be omitted
entirely. The use of size means one of w or l, and
it may be omitted, along with the leading colon, unless a scale is also
specified. The use of scale means one of 1, 2,
4, or 8, and it may always be omitted along with the
leading colon.
The following addressing modes are understood:
#number
%d0 through %d7
%a0 through %a7%a7 is also known as %sp, i.e. the Stack Pointer. %a6
is also known as %fp, the Frame Pointer.
%a0@ through %a7@
%a0@+ through %a7@+
%a0@- through %a7@-
apc@(number)
apc@(number,register:size:scale)
The number may be omitted.
apc@(number)@(onumber,register:size:scale)
The onumber or the register, but not both, may be omitted.
apc@(number,register:size:scale)@(onumber)
The number may be omitted. Omitting the register produces
the Postindex addressing mode.
symbol, or digits, optionally followed by
:b, :w, or :l.
The standard Motorola syntax for this chip differs from the syntax
already discussed (see Syntax). as can
accept Motorola syntax for operands, even if MIT syntax is used for
other operands in the same instruction. The two kinds of syntax are
fully compatible.
In the following table apc stands for any of the address registers
(%a0 through %a7), the program counter (%pc), the
zero-address relative to the program counter (%zpc), or a
suppressed address register (%za0 through %za7). The use
of size means one of w or l, and it may always be
omitted along with the leading dot. The use of scale means one of
1, 2, 4, or 8, and it may always be omitted
along with the leading asterisk.
The following additional addressing modes are understood:
(%a0) through (%a7)%a7 is also known as %sp, i.e. the Stack Pointer. %a6
is also known as %fp, the Frame Pointer.
(%a0)+ through (%a7)+
-(%a0) through -(%a7)
number(%a0) through number(%a7),
or number(%pc).
The number may also appear within the parentheses, as in
(number,%a0). When used with the pc, the
number may be omitted (with an address register, omitting the
number produces Address Register Indirect mode).
number(apc,register.size*scale)
The number may be omitted, or it may appear within the
parentheses. The apc may be omitted. The register and the
apc may appear in either order. If both apc and
register are address registers, and the size and scale
are omitted, then the first register is taken as the base register, and
the second as the index register.
([number,apc],register.size*scale,onumber)
The onumber, or the register, or both, may be omitted.
Either the number or the apc may be omitted, but not both.
([number,apc,register.size*scale],onumber)
The number, or the apc, or the register, or any two of them, may be omitted. The onumber may be omitted. The register and the apc may appear in either order. If both apc and register are address registers, and the size and scale are omitted, then the first register is taken as the base register, and the second as the index register.
Packed decimal (P) format floating literals are not supported. Feel free to add the code!
The floating point formats generated by directives are these.
.float
Single precision floating point constants.
.double
Double precision floating point constants.
.extend
.ldouble
Extended precision (long double) floating point constants.
In order to be compatible with the Sun assembler the 680x0 assembler understands the following directives.
.data1
.data 1 directive.
.data2
.data 2 directive.
.even
.align directive; it
aligns the output to an even byte boundary.
.skip
.space directive.
Certain pseudo opcodes are permitted for branch instructions.
They expand to the shortest branch instruction that reach the
target. Generally these mnemonics are made by substituting j for
b at the start of a Motorola mnemonic.
The following table summarizes the pseudo-operations. A * flags
cases that are more fully described after the table:
Displacement
+------------------------------------------------------------
| 68020 68000/10, not PC-relative OK
Pseudo-Op |BYTE WORD LONG ABSOLUTE LONG JUMP **
+------------------------------------------------------------
jbsr |bsrs bsrw bsrl jsr
jra |bras braw bral jmp
* jXX |bXXs bXXw bXXl bNXs;jmp
* dbXX | N/A dbXXw dbXX;bras;bral dbXX;bras;jmp
fjXX | N/A fbXXw fbXXl N/A
XX: condition
NX: negative of condition XX
*--see full description below**--this expansion mode is disallowed by --pcreljbsr
jra
--pcrel option is not
given, an absolute long jump will be emitted instead. If no long
branches are available, the --pcrel option is given, and a word
branch cannot reach the target, an error message is generated.
In addition to standard branch operands, as allows these
pseudo-operations to have all operands that are allowed for jsr and jmp,
substituting these instructions if the operand given is not valid for a
branch instruction.
jXX
jXX stands for an entire family of pseudo-operations,
where XX is a conditional branch or condition-code test. The full
list of pseudo-ops in this family is:
jhi jls jcc jcs jne jeq jvc jvs jpl jmi jge jlt jgt jle
Usually, each of these pseudo-operations expands to a single branch
instruction. However, if a word branch is not sufficient, no long branches
are available, and the --pcrel option is not given, as
issues a longer code fragment in terms of NX, the opposite condition
to XX. For example, under these conditions:
jXX foogives
bNXs oof
jmp foo
oof:
dbXX
dbhi dbls dbcc dbcs dbne dbeq dbvc dbvs dbpl dbmi dbge dblt dbgt dble dbf dbra dbt
Motorola dbXX instructions allow word displacements only. When
a word displacement is sufficient, each of these pseudo-operations expands
to the corresponding Motorola instruction. When a word displacement is not
sufficient and long branches are available, when the source reads
dbXX foo, as emits
dbXX oo1
bras oo2
oo1:bral foo
oo2:
If, however, long branches are not available and the --pcrel option is
not given, as emits
dbXX oo1
bras oo2
oo1:jmp foo
oo2:
fjXX
fjne fjeq fjge fjlt fjgt fjle fjf fjt fjgl fjgle fjnge fjngl fjngle fjngt fjnle fjnlt fjoge fjogl fjogt fjole fjolt fjor fjseq fjsf fjsne fjst fjueq fjuge fjugt fjule fjult fjun
Each of these pseudo-operations always expands to a single Motorola coprocessor branch instruction, word or long. All Motorola coprocessor branch instructions allow both word and long displacements.
The immediate character is # for Sun compatibility. The
line-comment character is | (unless the --bitwise-or
option is used). If a # appears at the beginning of a line, it
is treated as a comment unless it looks like # line file, in
which case it is treated normally.
The Motorola 68HC11 and 68HC12 version of as has a few machine
dependent options.
This option switches the assembler in the M68HC11 mode. In this mode, the assembler only accepts 68HC11 operands and mnemonics. It produces code for the 68HC11.
This option switches the assembler in the M68HC12 mode. In this mode, the assembler also accepts 68HC12 operands and mnemonics. It produces code for the 68HC12. A fiew 68HC11 instructions are replaced by some 68HC12 instructions as recommended by Motorola specifications.
You can use the --strict-direct-mode option to disable
the automatic translation of direct page mode addressing into
extended mode when the instruction does not support direct mode.
For example, the clr instruction does not support direct page
mode addressing. When it is used with the direct page mode,
as will ignore it and generate an absolute addressing.
This option prevents as from doing this, and the wrong
usage of the direct page mode will raise an error.
The --short-branchs option turns off the translation of
relative branches into absolute branches when the branch offset is
out of range. By default as transforms the relative
branch (bsr, bgt, bge, beq, bne,
ble, blt, bhi, bcc, bls,
bcs, bmi, bvs, bvs, bra) into
an absolute branch when the offset is out of the -128 .. 127 range.
In that case, the bsr instruction is translated into a
jsr, the bra instruction is translated into a
jmp and the conditional branchs instructions are inverted and
followed by a jmp. This option disables these translations
and as will generate an error if a relative branch
is out of range. This option does not affect the optimization
associated to the jbra, jbsr and jbXX pseudo opcodes.
The --force-long-branchs option forces the translation of
relative branches into absolute branches. This option does not affect
the optimization associated to the jbra, jbsr and
jbXX pseudo opcodes.
You can use the --print-insn-syntax option to obtain the
syntax description of the instruction when an error is detected.
The --print-opcodes option prints the list of all the
instructions with their syntax. The first item of each line
represents the instruction name and the rest of the line indicates
the possible operands for that instruction. The list is printed
in alphabetical order. Once the list is printed as
exits.
The --generate-example option is similar to --print-opcodes
but it generates an example for each instruction instead.
In the M68HC11 syntax, the instruction name comes first and it may
be followed by one or several operands (up to three). Operands are
separated by comma (,). In the normal mode,
as will complain if too many operands are specified for
a given instruction. In the MRI mode (turned on with -M option),
it will treat them as comments. Example:
inx lda #23 bset 2,x #4 brclr *bot #8 foo
The following addressing modes are understood:
#number
number,X, number,Y
The number may be omitted in which case 0 is assumed.
*symbol, or *digits
symbol, or digits
Packed decimal (P) format floating literals are not supported. Feel free to add the code!
The floating point formats generated by directives are these.
.float
Single precision floating point constants.
.double
Double precision floating point constants.
.extend
.ldouble
Extended precision (long double) floating point constants.
Certain pseudo opcodes are permitted for branch instructions.
They expand to the shortest branch instruction that reach the
target. Generally these mnemonics are made by prepending j to
the start of Motorola mnemonic. These pseudo opcodes are not affected
by the --short-branchs or --force-long-branchs options.
The following table summarizes the pseudo-operations.
Displacement Width
+-------------------------------------------------------------+
| Options |
| --short-branchs --force-long-branchs |
+--------------------------+----------------------------------+
Pseudo-Op |BYTE WORD | BYTE WORD |
+--------------------------+----------------------------------+
bsr | bsr <pc-rel> <error> | jsr <abs> |
bra | bra <pc-rel> <error> | jmp <abs> |
jbsr | bsr <pc-rel> jsr <abs> | bsr <pc-rel> jsr <abs> |
jbra | bra <pc-rel> jmp <abs> | bra <pc-rel> jmp <abs> |
bXX | bXX <pc-rel> <error> | bNX +3; jmp <abs> |
jbXX | bXX <pc-rel> bNX +3; | bXX <pc-rel> bNX +3; jmp <abs> |
| jmp <abs> | |
+--------------------------+----------------------------------+
XX: condition
NX: negative of condition XX
jbsr
jbra
jbXX
jbXX stands for an entire family of pseudo-operations,
where XX is a conditional branch or condition-code test. The full
list of pseudo-ops in this family is:
jbcc jbeq jbge jbgt jbhi jbvs jbpl jblo jbcs jbne jblt jble jbls jbvc jbmi
For the cases of non-PC relative displacements and long displacements,
as issues a longer code fragment in terms of
NX, the opposite condition to XX. For example, for the
non-PC relative case:
jbXX foogives
bNXs oof
jmp foo
oof:
The M88K version of the assembler supports the following machine directives:
.align
.dfloat expr
.ffloat expr
.half expr
.word expr
.string "str"
.ascii directive for
copying str into the object file. The string is not terminated
with a null byte.
.set symbol, value
set, which is a legitimate M88K instruction.
.def symbol, value
.set and is presumably provided
for compatibility with other M88K assemblers.
.bss symbol, length, align
.lcomm only in that it permits you to specify
an alignment. See .lcomm.
GNU as for MIPS architectures supports several
different MIPS processors, and MIPS ISA levels I through V, MIPS32,
and MIPS64. For information about the MIPS instruction set, see
MIPS RISC Architecture, by Kane and Heindrich (Prentice-Hall).
For an overview of MIPS assembly conventions, see "Appendix D:
Assembly Language Programming" in the same work.
The MIPS configurations of GNU as support these
special options:
-G num
gp register. It is only accepted for targets
that use ECOFF format. The default value is 8.
-EB
-EL
as can select big-endian or
little-endian output at run time (unlike the other GNU development
tools, which must be configured for one or the other). Use -EB
to select big-endian output, and -EL for little-endian.
-mips1
-mips2
-mips3
-mips4
-mips5
-mips32
-mips64
-mips1 corresponds to the R2000 and R3000 processors,
-mips2 to the R6000 processor, -mips3 to the
R4000 processor, and -mips4 to the R8000 and
R10000 processors. -mips5, -mips32, and
-mips64 correspond to generic MIPS V, MIPS32, and
MIPS64 ISA processors, respectively. You can also switch
instruction sets during the assembly; see Directives to override the ISA level.
-mgp32
-mfp32
-mgp32 controls the size of general-purpose registers
and -mfp32 controls the size of floating-point registers.
On some MIPS variants there is a 32-bit mode flag; when this flag is
set, 64-bit instructions generate a trap. Also, some 32-bit OSes only
save the 32-bit registers on a context switch, so it is essential never
to use the 64-bit registers.
-mgp64
-mips16
-no-mips16
.set mips16 at the start of the assembly file. -no-mips16
turns off this option.
-mfix7000
-no-mfix7000
-m4010
-no-m4010
addciu, ffc,
etc.), and to not schedule nop instructions around accesses to
the HI and LO registers. -no-m4010 turns off this
option.
-m4650
-no-m4650
mad and madu instruction, and to not schedule nop
instructions around accesses to the HI and LO registers.
-no-m4650 turns off this option.
-m3900
-no-m3900
-m4100
-no-m4100
-mnnnn, generate code for the MIPS
RNNNN chip. This tells the assembler to accept instructions
specific to that chip, and to schedule for that chip's hazards.
-march=cpu
-mcpu, except that there are more value of cpu
understood. Valid cpu value are:
2000, 3000, 3900, 4000, 4010, 4100, 4111, 4300, 4400, 4600, 4650, 5000, rm5200, rm5230, rm5231, rm5261, rm5721, 6000, rm7000, 8000, 10000, 12000, mips32-4k, sb1
-mtune=cpu
-march=cpu.
-mcpu=cpu
-march=cpu and -mtune=cpu. Valid
cpu values are identical to -march=cpu.
Use of this option is discouraged.
-nocpp
as, there is no need for -nocpp, because the
GNU assembler itself never runs the C preprocessor.
--construct-floats
--no-construct-floats
--no-construct-floats option disables the construction of
double width floating point constants by loading the two halves of the
value into the two single width floating point registers that make up
the double width register. This feature is useful if the processor
support the FR bit in its status register, and this bit is known (by
the programmer) to be set. This bit prevents the aliasing of the double
width register by the single width registers.
By default --construct-floats is selected, allowing construction
of these floating point constants.
--trap
--no-break
as automatically macro expands certain division and
multiplication instructions to check for overflow and division by zero. This
option causes as to generate code to take a trap exception
rather than a break exception when an error is detected. The trap instructions
are only supported at Instruction Set Architecture level 2 and higher.
--break
--no-trap
-n
as will issue a warning every
time it generates a nop instruction from a macro.
Assembling for a MIPS ECOFF target supports some additional sections
besides the usual .text, .data and .bss. The
additional sections are .rdata, used for read-only data,
.sdata, used for small data, and .sbss, used for small
common objects.
When assembling for ECOFF, the assembler uses the $gp ($28)
register to form the address of a "small object". Any object in the
.sdata or .sbss sections is considered "small" in this sense.
For external objects, or for objects in the .bss section, you can use
the gcc -G option to control the size of objects addressed via
$gp; the default value is 8, meaning that a reference to any object
eight bytes or smaller uses $gp. Passing -G 0 to
as prevents it from using the $gp register on the basis
of object size (but the assembler uses $gp for objects in .sdata
or sbss in any case). The size of an object in the .bss section
is set by the .comm or .lcomm directive that defines it. The
size of an external object may be set with the .extern directive. For
example, .extern sym,4 declares that the object at sym is 4 bytes
in length, whie leaving sym otherwise undefined.
Using small ECOFF objects requires linker support, and assumes that the
$gp register is correctly initialized (normally done automatically by
the startup code). MIPS ECOFF assembly code must not modify the
$gp register.
MIPS ECOFF as supports several directives used for
generating debugging information which are not support by traditional MIPS
assemblers. These are .def, .endef, .dim, .file,
.scl, .size, .tag, .type, .val,
.stabd, .stabn, and .stabs. The debugging information
generated by the three .stab directives can only be read by GDB,
not by traditional MIPS debuggers (this enhancement is required to fully
support C++ debugging). These directives are primarily used by compilers, not
assembly language programmers!
GNU as supports an additional directive to change
the MIPS Instruction Set Architecture level on the fly: .set
mipsn. n should be a number from 0 to 5, or 32 or 64.
The values 1 to 5, 32, and 64 make the assembler accept instructions
for the corresponding ISA level, from that point on in the
assembly. .set mipsn affects not only which instructions
are permitted, but also how certain macros are expanded. .set
mips0 restores the ISA level to its original level: either the
level you selected with command line options, or the default for your
configuration. You can use this feature to permit specific R4000
instructions while assembling in 32 bit mode. Use this directive with
care!
The directive .set mips16 puts the assembler into MIPS 16 mode,
in which it will assemble instructions for the MIPS 16 processor. Use
.set nomips16 to return to normal 32 bit mode.
Traditional MIPS assemblers do not support this directive.
By default, MIPS 16 instructions are automatically extended to 32 bits
when necessary. The directive .set noautoextend will turn this
off. When .set noautoextend is in effect, any 32 bit instruction
must be explicitly extended with the .e modifier (e.g.,
li.e $4,1000). The directive .set autoextend may be used
to once again automatically extend instructions when necessary.
This directive is only meaningful when in MIPS 16 mode. Traditional MIPS assemblers do not support this directive.
The .insn directive tells as that the following
data is actually instructions. This makes a difference in MIPS 16 mode:
when loading the address of a label which precedes instructions,
as automatically adds 1 to the value, so that jumping to
the loaded address will do the right thing.
The directives .set push and .set pop may be used to save
and restore the current settings for all the options which are
controlled by .set. The .set push directive saves the
current settings on a stack. The .set pop directive pops the
stack and restores the settings.
These directives can be useful inside an macro which must change an option such as the ISA level or instruction reordering but does not want to change the state of the code which invoked the macro.
Traditional MIPS assemblers do not support these directives.
mmixal syntax and semantics
The MMIX version of as has some machine-dependent options.
When --fixed-special-register-names is specified, only the register
names specified in MMIX-Regs are recognized in the instructions
PUT and GET.
You can use the --globalize-symbols to make all symbols global.
This option is useful when splitting up a mmixal program into
several files.
The --gnu-syntax turns off most syntax compatibility with
mmixal. Its usability is currently doubtful.
The --relax option is not fully supported, but will eventually make
the object file prepared for linker relaxation.
If you want to avoid inadvertently calling a predefined symbol and would
rather get an error, for example when using as with a
compiler or other machine-generated code, specify
--no-predefined-syms. This turns off built-in predefined
definitions of all such symbols, including rounding-mode symbols, segment
symbols, BIT symbols, and TRAP symbols used in mmix
"system calls". It also turns off predefined special-register names,
except when used in PUT and GET instructions.
By default, some instructions are expanded to fit the size of the operand
or an external symbol (see MMIX-Expand). By passing
--no-expand, no such expansion will be done, instead causing errors
at link time if the operand does not fit.
The mmixal documentation (see mmixsite) specifies that global
registers allocated with the GREG directive (see MMIX-greg) and
initialized to the same non-zero value, will refer to the same global
register. This isn't strictly enforcable in as since the
final addresses aren't known until link-time, but it will do an effort
unless the --no-merge-gregs option is specified. (Register merging
isn't yet implemented in ld.)
as will warn every time it expands an instruction to fit an
operand unless the option -x is specified. It is believed that
this behaviour is more useful than just mimicking mmixal's
behaviour, in which instructions are only expanded if the -x option
is specified, and assembly fails otherwise, when an instruction needs to
be expanded. It needs to be kept in mind that mmixal is both an
assembler and linker, while as will expand instructions
that at link stage can be contracted. (Though linker relaxation isn't yet
implemented in ld.) The option -x also imples
--linker-allocated-gregs.
Usually a two-operand-expression (see GREG-base) without a matching
GREG directive is treated as an error by as. When
the option --linker-allocated-gregs is in effect, they are instead
passed through to the linker, which will allocate as many global registers
as is needed.
When as encounters an instruction with an operand that is
either not known or does not fit the operand size of the instruction,
as (and ld) will expand the instruction into
a sequence of instructions semantically equivalent to the operand fitting
the instruction. Expansion will take place for the following
instructions:
GETA
SETL, INCML,
INCMH and INCH. The operand must be a multiple of four.
$255 to the operand value, which like with GETA must
be a multiple of four, and a final GO $255,$255,0.
PUSHJ
$255 to the operand value, followed by a PUSHGO $255,$255,0.
JMP
PUSHJ. The final instruction
is GO $255,$255,0.
The linker ld is expected to shrink these expansions for
code assembled with --relax (though not currently implemented).
The assembly syntax is supposed to be upward compatible with that
described in Sections 1.3 and 1.4 of The Art of Computer
Programming, Volume 1. Draft versions of those chapters as well as other
MMIX information is located at
<http://www-cs-faculty.stanford.edu/~knuth/mmix-news.html>.
Most code examples from the mmixal package located there should work
unmodified when assembled and linked as single files, with a few
noteworthy exceptions (see MMIX-mmixal).
Before an instruction is emitted, the current location is aligned to the next four-byte boundary. If a label is defined at the beginning of the line, its value will be the aligned value.
In addition to the traditional hex-prefix 0x, a hexadecimal number
can also be specified by the prefix character #.
After all operands to an MMIX instruction or directive have been specified, the rest of the line is ignored, treated as a comment.
The characters * and # are line comment characters; each
start a comment at the beginning of a line, but only at the beginning of a
line. A # prefixes a hexadecimal number if found elsewhere on a
line.
Two other characters, % and !, each start a comment anywhere
on the line. Thus you can't use the modulus and not
operators in expressions normally associated with these two characters.
A ; is a line separator, treated as a new-line, so separate
instructions can be specified on a single line.
The character : is permitted in identifiers. There are two
exceptions to it being treated as any other symbol character: if a symbol
begins with :, it means that the symbol is in the global namespace
and that the current prefix should not be prepended to that symbol
(see MMIX-prefix). The : is then not considered part of the
symbol. For a symbol in the label position (first on a line), a :
at the end of a symbol is silently stripped off. A label is permitted,
but not required, to be followed by a :, as with many other
assembly formats.
The character @ in an expression, is a synonym for ., the
current location.
In addition to the common forward and backward local symbol formats
(see Symbol Names), they can be specified with upper-case B and
F, as in 8B and 9F. A local label defined for the
current position is written with a H appended to the number:
3H LDB $0,$1,2This and traditional local-label formats cannot be mixed: a label must be defined and referred to using the same format.
There's a minor caveat: just as for the ordinary local symbols, the local
symbols are translated into ordinary symbols using control characters are
to hide the ordinal number of the symbol. Unfortunately, these symbols
are not translated back in error messages. Thus you may see confusing
error messages when local symbols are used. Control characters
\003 (control-C) and \004 (control-D) are used for the
MMIX-specific local-symbol syntax.
The symbol Main is handled specially; it is always global.
By defining the symbols __.MMIX.start..text and
__.MMIX.start..data, the address of respectively the .text
and .data segments of the final program can be defined, though when
linking more than one object file, the code or data in the object file
containing the symbol is not guaranteed to be start at that position; just
the final executable. See MMIX-loc.
Local and global registers are specified as $0 to $255.
The recognized special register names are rJ, rA, rB,
rC, rD, rE, rF, rG, rH,
rI, rK, rL, rM, rN, rO,
rP, rQ, rR, rS, rT, rU,
rV, rW, rX, rY, rZ, rBB,
rTT, rWW, rXX, rYY and rZZ. A leading
: is optional for special register names.
Local and global symbols can be equated to register names and used in place of ordinary registers.
Similarly for special registers, local and global symbols can be used.
Also, symbols equated from numbers and constant expressions are allowed in
place of a special register, except when either of the options
--no-predefined-syms and --fixed-special-register-names are
specified. Then only the special register names above are allowed for the
instructions having a special register operand; GET and PUT.
LOC
The LOC directive sets the current location to the value of the
operand field, which may include changing sections. If the operand is a
constant, the section is set to either .data if the value is
0x2000000000000000 or larger, else it is set to .text.
Within a section, the current location may only be changed to
monotonically higher addresses. A LOC expression must be a previously
defined symbol or a "pure" constant.
An example, which sets the label prev to the current location, and
updates the current location to eight bytes forward:
prev LOC @+8
When a LOC has a constant as its operand, a symbol
__.MMIX.start..text or __.MMIX.start..data is defined
depending on the address as mentioned above. Each such symbol is
interpreted as special by the linker, locating the section at that
address. Note that if multiple files are linked, the first object file
with that section will be mapped to that address (not necessarily the file
with the LOC definition).
LOCAL
LOCAL external_symbol LOCAL 42 .local asymbol
This directive-operation generates a link-time assertion that the operand
does not correspond to a global register. The operand is an expression
that at link-time resolves to a register symbol or a number. A number is
treated as the register having that number. There is one restriction on
the use of this directive: the pseudo-directive must be placed in a
section with contents, code or data.
IS
asymbol IS an_expressionsets the symbol
asymbol to an_expression. A symbol may not
be set more than once using this directive. Local labels may be set using
this directive, for example:
5H IS @+4
GREG
This directive reserves a global register, gives it an initial value and
optionally gives it a symbolic name. Some examples:
areg GREG
breg GREG data_value
GREG data_buffer
.greg creg, another_data_value
The symbolic register name can be used in place of a (non-special)
register. If a value isn't provided, it defaults to zero. Unless the
option --no-merge-gregs is specified, non-zero registers allocated
with this directive may be eliminated by as; another
register with the same value used in its place.
Any of the instructions
CSWAP,
GO,
LDA,
LDBU,
LDB,
LDHT,
LDOU,
LDO,
LDSF,
LDTU,
LDT,
LDUNC,
LDVTS,
LDWU,
LDW,
PREGO,
PRELD,
PREST,
PUSHGO,
STBU,
STB,
STCO,
STHT,
STOU,
STSF,
STTU,
STT,
STUNC,
SYNCD,
SYNCID,
can have a value nearby an initial value in place of its
second and third operands. Here, "nearby" is defined as within the
range 0...255 from the initial value of such an allocated register.
buffer1 BYTE 0,0,0,0,0 buffer2 BYTE 0,0,0,0,0 ... GREG buffer1 LDOU $42,buffer2In the example above, the
Y field of the LDOUI instruction
(LDOU with a constant Z) will be replaced with the global register
allocated for buffer1, and the Z field will have the value
5, the offset from buffer1 to buffer2. The result is
equivalent to this code:
buffer1 BYTE 0,0,0,0,0 buffer2 BYTE 0,0,0,0,0 ... tmpreg GREG buffer1 LDOU $42,tmpreg,(buffer2-buffer1)
Global registers allocated with this directive are allocated in order
higher-to-lower within a file. Other than that, the exact order of
register allocation and elimination is undefined. For example, the order
is undefined when more than one file with such directives are linked
together. With the options -x and --linker-allocated-gregs,
GREG directives for two-operand cases like the one mentioned above
can be omitted. Sufficient global registers will then be allocated by the
linker.
BYTE
The BYTE directive takes a series of operands separated by a comma.
If an operand is a string (see Strings), each character of that string
is emitted as a byte. Other operands must be constant expressions without
forward references, in the range 0...255. If you need operands having
expressions with forward references, use .byte (see Byte). An
operand can be omitted, defaulting to a zero value.
WYDE
TETRA
OCTA
The directives WYDE, TETRA and OCTA emit constants of
two, four and eight bytes size respectively. Before anything else happens
for the directive, the current location is aligned to the respective
constant-size bondary. If a label is defined at the beginning of the
line, its value will be that after the alignment. A single operand can be
omitted, defaulting to a zero value emitted for the directive. Operands
can be expressed as strings (see Strings), in which case each
character in the string is emitted as a separate constant of the size
indicated by the directive.
PREFIX
The PREFIX directive sets a symbol name prefix to be prepended to
all symbols (except local symbols, see MMIX-Symbols), that are not
prefixed with :, until the next PREFIX directive. Such
prefixes accumulate. For example,
PREFIX a PREFIX b c IS 0defines a symbol
abc with the value 0.
BSPEC
ESPEC
A pair of BSPEC and ESPEC directives delimit a section of
special contents (without specified semantics). Example:
BSPEC 42 TETRA 1,2,3 ESPECThe single operand to
BSPEC must be number in the range
0...255. The BSPEC number 80 is used by the GNU binutils
implementation.
mmixalThe binutils as and ld combination has a few
differences in function compared to mmixal (see mmixsite).
The replacement of a symbol with a GREG-allocated register
(see GREG-base) is not handled the exactly same way in
as as in mmixal. This is apparent in the
mmixal example file inout.mms, where different registers
with different offsets, eventually yielding the same address, are used in
the first instruction. This type of difference should however not affect
the function of any program unless it has specific assumptions about the
allocated register number.
Line numbers (in the mmo object format) are currently not
supported.
Expression operator precedence is not that of mmixal: operator precedence is that of the C programming language. It's recommended to use parentheses to explicitly specify wanted operator precedence whenever more than one type of operators are used.
The serialize unary operator &, the fractional division operator
//, the logical not operator ! and the modulus operator
% are not available.
Symbols are not global by default, unless the option
--globalize-symbols is passed. Use the .global directive to
globalize symbols (see Global).
Operand syntax is a bit stricter with as than
mmixal. For example, you can't say addu 1,2,3, instead you
must write addu $1,$2,3.
You can't LOC to a lower address than those already visited (i.e. "backwards").
A LOC directive must come before any emitted code.
Predefined symbols are visible as file-local symbols after use. (In the ELF file, that is--the linked mmo file has no notion of a file-local symbol.)
Some mapping of constant expressions to sections in LOC expressions is
attempted, but that functionality is easily confused and should be avoided
unless compatibility with mmixal is required. A LOC expression to
0x2000000000000000 or higher, maps to the .data section and
lower addresses map to the .text section (see MMIX-loc).
The code and data areas are each contiguous. Sparse programs with
far-away LOC directives will take up the same amount of space as a
contiguous program with zeros filled in the gaps between the LOC
directives. If you need sparse programs, you might try and get the wanted
effect with a linker script and splitting up the code parts into sections
(see Section). Assembly code for this, to be compatible with
mmixal, would look something like:
.if 0 LOC away_expression .else .section away,"ax" .fi
as will not execute the LOC directive and mmixal
ignores the lines with .. This construct can be used generally to
help compatibility.
Symbols can't be defined twice-not even to the same value.
Instruction mnemonics are recognized case-insensitive, though the
IS and GREG pseudo-operations must be specified in
upper-case characters.
There's no unicode support.
The following is a list of programs in mmix.tar.gz, available at
<http://www-cs-faculty.stanford.edu/~knuth/mmix-news.html>, last
checked with the version dated 2001-08-25 (md5sum
c393470cfc86fac040487d22d2bf0172) that assemble with mmixal but do
not assemble with as:
silly.mms
sim.mms
Done.
test.mms
&.
The PDP-11 version of as has a rich set of machine
dependent options.
-mpic | -mno-pic
The default is to generate position-independent code.
These options enables or disables the use of extensions over the base
line instruction set as introduced by the first PDP-11 CPU: the KA11.
Most options come in two variants: a -mextension that
enables extension, and a -mno-extension that disables
extension.
The default is to enable all extensions.
-mall | -mall-extensions
-mno-extensions
-mcis | -mno-cis
ADDNI, ADDN, ADDPI,
ADDP, ASHNI, ASHN, ASHPI, ASHP,
CMPCI, CMPC, CMPNI, CMPN, CMPPI,
CMPP, CVTLNI, CVTLN, CVTLPI, CVTLP,
CVTNLI, CVTNL, CVTNPI, CVTNP, CVTPLI,
CVTPL, CVTPNI, CVTPN, DIVPI, DIVP,
L2DR, L3DR, LOCCI, LOCC, MATCI,
MATC, MOVCI, MOVC, MOVRCI, MOVRC,
MOVTCI, MOVTC, MULPI, MULP, SCANCI,
SCANC, SKPCI, SKPC, SPANCI, SPANC,
SUBNI, SUBN, SUBPI, and SUBP.
-mcsm | -mno-csm
CSM instruction.
-meis | -mno-eis
ASHC, ASH, DIV,
MARK, MUL, RTT, SOB SXT, and
XOR.
-mfis | -mkev11
-mno-fis | -mno-kev11
FADD, FDIV, FMUL, and FSUB.
-mfpp | -mfpu | -mfp-11
-mno-fpp | -mno-fpu | -mno-fp-11
ABSF, ADDF, CFCC, CLRF, CMPF,
DIVF, LDCFF, LDCIF, LDEXP, LDF,
LDFPS, MODF, MULF, NEGF, SETD,
SETF, SETI, SETL, STCFF, STCFI,
STEXP, STF, STFPS, STST, SUBF, and
TSTF.
-mlimited-eis | -mno-limited-eis
MARK, RTT, SOB, SXT, and XOR.
The -mno-limited-eis options also implies -mno-eis.
-mmfpt | -mno-mfpt
MFPT instruction.
-mmultiproc | -mno-multiproc
TSTSET and
WRTLCK.
-mmxps | -mno-mxps
MFPS and MTPS instructions.
-mspl | -mno-spl
SPL instruction.
Enable (or disable) the use of the microcode instructions: LDUB,
MED, and XFC.
These options enable the instruction set extensions supported by a particular CPU, and disables all other extensions.
-mka11
-mkb11
SPL.
-mkd11a
-mkd11b
-mkd11d
-mkd11e
MFPS, and MTPS.
-mkd11f | -mkd11h | -mkd11q
MFPS, and MTPS.
-mkd11k
LDUB, MED,
MFPS, MFPT, MTPS, and XFC.
-mkd11z
CSM, MFPS,
MFPT, MTPS, and SPL.
-mf11
MFPS, MFPT, and
MTPS.
-mj11
CSM, MFPS,
MFPT, MTPS, SPL, TSTSET, and WRTLCK.
-mt11
MFPS, and
MTPS.
These options enable the instruction set extensions supported by a particular machine model, and disables all other extensions.
-m11/03
-mkd11f.
-m11/04
-mkd11d.
-m11/05 | -m11/10
-mkd11b.
-m11/15 | -m11/20
-mka11.
-m11/21
-mt11.
-m11/23 | -m11/24
-mf11.
-m11/34
-mkd11e.
-m11/34a
-mkd11e -mfpp.
-m11/35 | -m11/40
-mkd11a.
-m11/44
-mkd11z.
-m11/45 | -m11/50 | -m11/55 | -m11/70
-mkb11.
-m11/53 | -m11/73 | -m11/83 | -m11/84 | -m11/93 | -m11/94
-mj11.
-m11/60
-mkd11k.
The PDP-11 version of as has a few machine
dependent assembler directives.
.bss
bss section.
.even
as supports both DEC syntax and BSD syntax. The only
difference is that in DEC syntax, a # character is used to denote
an immediate constants, while in BSD syntax the character for this
purpose is $.
eneral-purpose registers are named r0 through r7.
Mnemonic alternatives for r6 and r7 are sp and
pc, respectively.
Floating-point registers are named ac0 through ac3, or
alternatively fr0 through fr3.
Comments are started with a # or a / character, and extend
to the end of the line. (FIXME: clash with immediates?)
Some instructions have alternative names.
BCC
BHIS
BCS
BLO
L2DR
L2D
L3DR
L3D
SYS
TRAP
The JBR and JCC synthetic instructions are not
supported yet.
as has two addiitional command-line options for the picoJava
architecture.
-ml
-mb
The PowerPC chip family includes several successive levels, using the same core instruction set, but including a few additional instructions at each level. There are exceptions to this however. For details on what instructions each variant supports, please see the chip's architecture reference manual.
The following table lists all available PowerPC options.
-mpwrx | -mpwr2
-mpwr
-m601
-mppc, -mppc32, -m603, -m604
-m403, -m405
-m7400, -m7410, -m7450, -m7455
-mppc64, -m620
-mppc64bridge
-mbooke64
-mbooke, mbooke32
-maltivec
-mpower4
-mcom
-many
-mregnames
-mno-regnames
-mrelocatable
-mrelocatable-lib
-memb
-mlittle, -mlittle-endian
-mbig, -mbig-endian
-msolaris
-mno-solaris
as has following command-line options for the Hitachi
SH family.
-little
-big
-relax
-small
-dsp
! is the line comment character.
You can use ; instead of a newline to separate statements.
Since $ has no special meaning, you may use it in symbol names.
You can use the predefined symbols r0, r1, r2,
r3, r4, r5, r6, r7, r8,
r9, r10, r11, r12, r13, r14,
and r15 to refer to the SH registers.
The SH also has these control registers:
pr
pc
mach
macl
sr
gbr
vbr
as understands the following addressing modes for the SH.
Rn in the following refers to any of the numbered
registers, but not the control registers.
Rn
@Rn
@-Rn
@Rn+
@(disp, Rn)
@(R0, Rn)
@(disp, GBR)
GBR offset
@(R0, GBR)
addr
@(disp, PC)
as implementation allows you to use the simpler form
addr anywhere a PC relative address is called for; the alternate
form is supported for compatibility with other assemblers.
#imm
The SH family has no hardware floating point, but the .float
directive generates IEEE floating-point numbers for compatibility
with other development tools.
uaword
ualong
as will issue a warning when a misaligned .word or
.long directive is used. You may use .uaword or
.ualong to indicate that the value is intentionally misaligned.
For detailed information on the SH machine instruction set, see SH-Microcomputer User's Manual (Hitachi Micro Systems, Inc.).
as implements all the standard SH opcodes. No additional
pseudo-instructions are needed on this family. Note, however, that
because as supports a simpler form of PC-relative
addressing, you may simply write (for example)
mov.l bar,r0
where other assemblers might require an explicit displacement to
bar from the program counter:
mov.l @(disp, PC)
-isa=shmedia | -isa=shcompact
SHmedia specifies the
32-bit opcodes, and SHcompact specifies the 16-bit opcodes
compatible with previous SH families. The default depends on the ABI
selected; the default for the 64-bit ABI is SHmedia, and the default for
the 32-bit ABI is SHcompact. If neither the ABI nor the ISA is
specified, the default is 32-bit SHcompact.
Note that the .mode pseudo-op is not permitted if the ISA is not
specified on the command line.
-abi=32 | -abi=64
Note that the .abi pseudo-op is not permitted if the ABI is not
specified on the command line. When the ABI is specified on the command
line, any .abi pseudo-ops in the source must match it.
-shcompact-const-crange
-no-mix
-no-expand
-expand-pt32
! is the line comment character.
You can use ; instead of a newline to separate statements.
Since $ has no special meaning, you may use it in symbol names.
You can use the predefined symbols r0 through r63 to refer
to the SH64 general registers, cr0 through cr63 for
control registers, tr0 through tr7 for target address
registers, fr0 through fr63 for single-precision floating
point registers, dr0 through dr62 (even numbered registers
only) for double-precision floating point registers, fv0 through
fv60 (multiples of four only) for single-precision floating point
vectors, fp0 through fp62 (even numbered registers only)
for single-precision floating point pairs, mtrx0 through
mtrx48 (multiples of 16 only) for 4x4 matrices of
single-precision floating point registers, pc for the program
counter, and fpscr for the floating point status and control
register.
You can also refer to the control registers by the mnemonics sr,
ssr, pssr, intevt, expevt, pexpevt,
tra, spc, pspc, resvec, vbr,
tea, dcr, kcr0, kcr1, ctc, and
usr.
SH64 operands consist of either a register or immediate value. The
immediate value can be a constant or label reference (or portion of a
label reference), as in this example:
movi 4,r2 pt function, tr4 movi (function >> 16) & 65535,r0 shori function & 65535, r0 ld.l r0,4,r0
Instruction label references can reference labels in either SHmedia or
SHcompact. To differentiate between the two, labels in SHmedia sections
will always have the least significant bit set (i.e. they will be odd),
which SHcompact labels will have the least significant bit reset
(i.e. they will be even). If you need to reference the actual address
of a label, you can use the datalabel modifier, as in this
example:
.long function .long datalabel function
In that example, the first longword may or may not have the least significant bit set depending on whether the label is an SHmedia label or an SHcompact label. The second longword will be the actual address of the label, regardless of what type of lable it is.
In addition to the SH directives, the SH64 provides the following directives:
.mode [shmedia|shcompact]
.isa [shmedia|shcompact]
objdump rely on symbolic
labels to determine when such mode switches occur (by checking the least
significant bit of the label's address), so such mode/isa changes should
always be followed by a label (in practice, this is true anyway). Note
that you cannot use these directives if you didn't specify an ISA on the
command line.
.abi [32|64]
.uaquad
For detailed information on the SH64 machine instruction set, see SuperH 64 bit RISC Series Architecture Manual (SuperH, Inc.).
as implements all the standard SH64 opcodes. In
addition, the following pseudo-opcodes may be expanded into one or more
alternate opcodes:
movi
movi opcode,
as will replace the movi with a sequence of
movi and shori opcodes.
pt
movi and shori opcode,
followed by a ptrel opcode, or to a pta or ptb
opcode, depending on the label referenced.
The SPARC chip family includes several successive levels, using the same core instruction set, but including a few additional instructions at each level. There are exceptions to this however. For details on what instructions each variant supports, please see the chip's architecture reference manual.
By default, as assumes the core instruction set (SPARC
v6), but "bumps" the architecture level as needed: it switches to
successively higher architectures as it encounters instructions that
only exist in the higher levels.
If not configured for SPARC v9 (sparc64-*-*) GAS will not bump
passed sparclite by default, an option must be passed to enable the
v9 instructions.
GAS treats sparclite as being compatible with v8, unless an architecture is explicitly requested. SPARC v9 is always incompatible with sparclite.
-Av6 | -Av7 | -Av8 | -Asparclet | -Asparclite
-Av8plus | -Av8plusa | -Av9 | -Av9a
-A options to select one of the SPARC
architectures explicitly. If you select an architecture explicitly,
as reports a fatal error if it encounters an instruction
or feature requiring an incompatible or higher level.
-Av8plus and -Av8plusa select a 32 bit environment.
-Av9 and -Av9a select a 64 bit environment and are not
available unless GAS is explicitly configured with 64 bit environment
support.
-Av8plusa and -Av9a enable the SPARC V9 instruction set with
UltraSPARC extensions.
-xarch=v8plus | -xarch=v8plusa
-bump
-32 | -64
SPARC GAS normally permits data to be misaligned. For example, it
permits the .long pseudo-op to be used on a byte boundary.
However, the native SunOS and Solaris assemblers issue an error when
they see misaligned data.
You can use the --enforce-aligned-data option to make SPARC GAS
also issue an error about misaligned data, just as the SunOS and Solaris
assemblers do.
The --enforce-aligned-data option is not the default because gcc
issues misaligned data pseudo-ops when it initializes certain packed
data structures (structures defined using the packed attribute).
You may have to assemble with GAS in order to initialize packed data
structures in your own code.
The Sparc uses IEEE floating-point numbers.
The Sparc version of as supports the following additional
machine directives:
.align
.common
"bss". This behaves somewhat like .comm, but the
syntax is different.
.half
.short.
.nword
.nword directive produces native word sized value,
ie. if assembling with -32 it is equivalent to .word, if assembling
with -64 it is equivalent to .xword.
.proc
.register
#scratch,
it is a scratch register, if it is #ignore, it just surpresses any
errors about using undeclared global register, but does not emit any
information about it into the object file. This can be useful e.g. if you
save the register before use and restore it after.
.reserve
"bss". This behaves somewhat like .lcomm, but the
syntax is different.
.seg
"text", "data", or
"data1". It behaves like .text, .data, or
.data 1.
.skip
.space directive.
.word
.word directive produces 32 bit values,
instead of the 16 bit values it produces on many other machines.
.xword
.xword directive produces
64 bit values.
The Z8000 as supports both members of the Z8000 family: the unsegmented Z8002, with 16 bit addresses, and the segmented Z8001 with 24 bit addresses.
When the assembler is in unsegmented mode (specified with the
unsegm directive), an address takes up one word (16 bit)
sized register. When the assembler is in segmented mode (specified with
the segm directive), a 24-bit address takes up a long (32 bit)
register. See Assembler Directives for the Z8000,
for a list of other Z8000 specific assembler directives.
as has no additional command-line options for the Zilog
Z8000 family.
! is the line comment character.
You can use ; instead of a newline to separate statements.
The Z8000 has sixteen 16 bit registers, numbered 0 to 15. You can refer
to different sized groups of registers by register number, with the
prefix r for 16 bit registers, rr for 32 bit registers and
rq for 64 bit registers. You can also refer to the contents of
the first eight (of the sixteen 16 bit registers) by bytes. They are
named rnh and rnl.
byte registers
r0l r0h r1h r1l r2h r2l r3h r3l r4h r4l r5h r5l r6h r6l r7h r7l
word registers
r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 r15
long word registers
rr0 rr2 rr4 rr6 rr8 rr10 rr12 rr14
quad word registers
rq0 rq4 rq8 rq12
rn
@rn
addr
address(rn)
rn(#imm)
rn(rm)
#xx
The Z8000 port of as includes these additional assembler directives,
for compatibility with other Z8000 assemblers. As shown, these do not
begin with . (unlike the ordinary as directives).
segm
unsegm
name
.file
global
.global
wval
.word
lval
.long
bval
.byte
sval
sval expects one string literal, delimited by
single quotes. It assembles each byte of the string into consecutive
addresses. You can use the escape sequence %xx (where
xx represents a two-digit hexadecimal number) to represent the
character whose ASCII value is xx. Use this feature to
describe single quote and other characters that may not appear in string
literals as themselves. For example, the C statement char *a = "he said \"it's 50% off\""; is represented in Z8000 assembly language
(shown with the assembler output in hex at the left) as
68652073 sval 'he said %22it%27s 50%25 off%22%00' 61696420 22697427 73203530 25206F66 662200
rsect
.section
block
.space
even
.align; aligns output to even byte boundary.
For detailed information on the Z8000 machine instruction set, see Z8000 Technical Manual.
The Vax version of as accepts any of the following options,
gives a warning message that the option was ignored and proceeds.
These options are for compatibility with scripts designed for other
people's assemblers.
-D (Debug)-S (Symbol Table)-T (Token Trace)-d (Displacement size for JUMPs)-d. Like options
that expect filenames, the number may immediately follow the
-d (old standard) or constitute the whole of the command line
argument that follows -d (GNU standard).
-V (Virtualize Interpass Temporary File)as always does this, so this
option is redundant.
-J (JUMPify Longer Branches)-t (Temporary File Directory)as does not use a temporary disk file, this
option makes no difference. -t needs exactly one
filename.
The Vax version of the assembler accepts additional options when compiled for VMS:
-h n
The -h n option determines how we map names. This takes
several values. No -h switch at all allows case hacking as
described above. A value of zero (-h0) implies names should be
upper case, and inhibits the case hack. A value of 2 (-h2)
implies names should be all lower case, with no case hack. A value of 3
(-h3) implies that case should be preserved. The value 1 is
unused. The -H option directs as to display
every mapped symbol during assembly.
Symbols whose names include a dollar sign $ are exceptions to the
general name mapping. These symbols are normally only used to reference
VMS library names. Such symbols are always mapped to upper case.
-+
-+ option causes as to truncate any symbol
name larger than 31 characters. The -+ option also prevents some
code following the _main symbol normally added to make the object
file compatible with Vax-11 "C".
-1
as
version 1.x.
-H
-H option causes as to print every symbol
which was changed by case mapping.
Conversion of flonums to floating point is correct, and compatible with previous assemblers. Rounding is towards zero if the remainder is exactly half the least significant bit.
D, F, G and H floating point formats
are understood.
Immediate floating literals (e.g. S`$6.9)
are rendered correctly. Again, rounding is towards zero in the
boundary case.
The .float directive produces f format numbers.
The .double directive produces d format numbers.
The Vax version of the assembler supports four directives for generating Vax floating point constants. They are described in the table below.
.dfloat
d format 64-bit floating point constants.
.ffloat
f format 32-bit floating point constants.
.gfloat
g format 64-bit floating point constants.
.hfloat
h format 128-bit floating point constants.
All DEC mnemonics are supported. Beware that case...
instructions have exactly 3 operands. The dispatch table that
follows the case... instruction should be made with
.word statements. This is compatible with all unix
assemblers we know of.
Certain pseudo opcodes are permitted. They are for branch
instructions. They expand to the shortest branch instruction that
reaches the target. Generally these mnemonics are made by
substituting j for b at the start of a DEC mnemonic.
This feature is included both for compatibility and to help
compilers. If you do not need this feature, avoid these
opcodes. Here are the mnemonics, and the code they can expand into.
jbsb
Jsb is already an instruction mnemonic, so we chose jbsb.
jbr
jr
jCOND
neq, nequ, eql, eqlu, gtr,
geq, lss, gtru, lequ, vc, vs,
gequ, cc, lssu, cs.
COND may also be one of the bit tests
bs, bc, bss, bcs, bsc, bcc,
bssi, bcci, lbs, lbc.
NOTCOND is the opposite condition to COND.
jacbX
b d f g h l w.
OPCODE ..., foo ; brb bar ; foo: jmp ... ; bar:
jaobYYY
lss leq.
jsobZZZ
geq gtr.
OPCODE ..., foo ; brb bar ; foo: brw destination ; bar:
OPCODE ..., foo ; brb bar ; foo: jmp destination ; bar:
aobleq
aoblss
sobgeq
sobgtr
OPCODE ..., foo ; brb bar ; foo: brw destination ; bar:
OPCODE ..., foo ; brb bar ; foo: jmp destination ; bar:
The immediate character is $ for Unix compatibility, not
# as DEC writes it.
The indirect character is * for Unix compatibility, not
@ as DEC writes it.
The displacement sizing character is ` (an accent grave) for
Unix compatibility, not ^ as DEC writes it. The letter
preceding ` may have either case. G is not
understood, but all other letters (b i l s w) are understood.
Register names understood are r0 r1 r2 ... r15 ap fp sp
pc. Upper and lower case letters are equivalent.
For instance
tstb *w`$4(r5)
Any expression is permitted in an operand. Operands are comma separated.
Vax bit fields can not be assembled with as. Someone
can add the required code if they really need it.
as supports the following additional command-line options
for the V850 processor family:
-wsigned_overflow
-wunsigned_overflow
-mv850
-mv850e
-mv850any
# is the line comment character.
as supports the following names for registers:
general register 0
general register 1
general register 2
general register 3
general register 4
general register 5
general register 6
general register 7
general register 8
general register 9
general register 10
general register 11
general register 12
general register 13
general register 14
general register 15
general register 16
general register 17
general register 18
general register 19
general register 20
general register 21
general register 22
general register 23
general register 24
general register 25
general register 26
general register 27
general register 28
general register 29
general register 30
general register 31
system register 0
system register 1
system register 2
system register 3
system register 4
system register 5
system register 16
system register 17
system register 18
system register 19
system register 20
The V850 family uses IEEE floating-point numbers.
.offset <expression>
.section "name", <type>
.v850
.v850e
as implements all the standard V850 opcodes.
as also implements the following pseudo ops:
hi0()
mulhi hi0(here - there), r5, r6
computes the difference between the address of labels 'here' and
'there', takes the upper 16 bits of this difference, shifts it down 16
bits and then mutliplies it by the lower 16 bits in register 5, putting
the result into register 6.
lo()
addi lo(here - there), r5, r6
computes the difference between the address of labels 'here' and
'there', takes the lower 16 bits of this difference and adds it to
register 5, putting the result into register 6.
hi()
movhi hi(here), r0, r6
movea lo(here), r6, r6
The reason for this special behaviour is that movea performs a sign
extention on its immediate operand. So for example if the address of
'here' was 0xFFFFFFFF then without the special behaviour of the hi()
pseudo-op the movhi instruction would put 0xFFFF0000 into r6, then the
movea instruction would takes its immediate operand, 0xFFFF, sign extend
it to 32 bits, 0xFFFFFFFF, and then add it into r6 giving 0xFFFEFFFF
which is wrong (the fifth nibble is E). With the hi() pseudo op adding
in the top bit of the lo() pseudo op, the movhi instruction actually
stores 0 into r6 (0xFFFF + 1 = 0x0000), so that the movea instruction
stores 0xFFFFFFFF into r6 - the right value.
hilo()
mov hilo(here), r6
computes the absolute address of label 'here' and puts the result into
register 6.
sdaoff()
ld.w sdaoff(_a_variable)[gp],r6
loads the contents of the location pointed to by the label '_a_variable'
into register 6, provided that the label is located somewhere within +/-
32K of the address held in the GP register. [Note the linker assumes
that the GP register contains a fixed address set to the address of the
label called '__gp'. This can either be set up automatically by the
linker, or specifically set by using the --defsym __gp=<value>
command line option].
tdaoff()
sld.w tdaoff(_a_variable)[ep],r6
loads the contents of the location pointed to by the label '_a_variable'
into register 6, provided that the label is located somewhere within +256
bytes of the address held in the EP register. [Note the linker assumes
that the EP register contains a fixed address set to the address of the
label called '__ep'. This can either be set up automatically by the
linker, or specifically set by using the --defsym __ep=<value>
command line option].
zdaoff()
movea zdaoff(_a_variable),zero,r6
puts the address of the label '_a_variable' into register 6, assuming
that the label is somewhere within the first 32K of memory. (Strictly
speaking it also possible to access the last 32K of memory as well, as
the offsets are signed).
ctoff()
callt ctoff(table_func1)
will put the call the function whoes address is held in the call table at the location labeled 'table_func1'.
For information on the V850 instruction set, see V850 Family 32-/16-Bit single-Chip Microcontroller Architecture Manual from NEC. Ltd.
Your bug reports play an essential role in making as reliable.
Reporting a bug may help you by bringing a solution to your problem, or it may
not. But in any case the principal function of a bug report is to help the
entire community by making the next version of as work better.
Bug reports are your contribution to the maintenance of as.
In order for a bug report to serve its purpose, you must include the information that enables us to fix the bug.
If you are not sure whether you have found a bug, here are some guidelines:
as bug. Reliable assemblers never crash.
as produces an error message for valid input, that is a bug.
as does not produce an error message for invalid input, that
is a bug. However, you should note that your idea of "invalid input" might
be our idea of "an extension" or "support for traditional practice".
as are welcome in any case.
A number of companies and individuals offer support for GNU products. If
you obtained as from a support organization, we recommend you
contact that organization first.
You can find contact information for many support companies and
individuals in the file etc/SERVICE in the GNU Emacs
distribution.
In any event, we also recommend that you send bug reports for as
to bug-binutils@gnu.org.
The fundamental principle of reporting bugs usefully is this: report all the facts. If you are not sure whether to state a fact or leave it out, state it!
Often people omit facts because they think they know what causes the problem and assume that some details do not matter. Thus, you might assume that the name of a symbol you use in an example does not matter. Well, probably it does not, but one cannot be sure. Perhaps the bug is a stray memory reference which happens to fetch from the location where that name is stored in memory; perhaps, if the name were different, the contents of that location would fool the assembler into doing the right thing despite the bug. Play it safe and give a specific, complete example. That is the easiest thing for you to do, and the most helpful.
Keep in mind that the purpose of a bug report is to enable us to fix the bug if it is new to us. Therefore, always write your bug reports on the assumption that the bug has not been reported previously.
Sometimes people give a few sketchy facts and ask, "Does this ring a bell?" Those bug reports are useless, and we urge everyone to refuse to respond to them except to chide the sender to report bugs properly.
To enable us to fix the bug, you should include all these things:
as. as announces it if you start
it with the --version argument.
Without this, we will not know whether there is any point in looking for
the bug in the current version of as.
as source.
as--e.g.
"gcc-2.7".
If we were to try to guess the arguments, we would probably guess wrong and then we might not encounter the bug.
-S option. If you are using gcc, use
the options -v --save-temps; this will save the assembler source in a
file with an extension of .s, and also show you exactly how
as is being run.
Of course, if the bug is that as gets a fatal signal, then we
will certainly notice it. But if the bug is incorrect output, we might not
notice unless it is glaringly wrong. You might as well not give us a chance to
make a mistake.
Even if the problem you experience is a fatal signal, you should still say so
explicitly. Suppose something strange is going on, such as, your copy of
as is out of synch, or you have encountered a bug in the C
library on your system. (This has happened!) Your copy might crash and ours
would not. If you told us to expect a crash, then when ours fails to crash, we
would know that the bug was not happening for us. If you had not told us to
expect a crash, then we would not be able to draw any conclusion from our
observations.
as source, send us context
diffs, as generated by diff with the -u, -c, or -p
option. Always send diffs from the old file to the new file. If you even
discuss something in the as source, refer to it by context, not
by line number.
The line numbers in our development sources will not match those in your sources. Your line numbers would convey no useful information to us.
Here are some things that are not necessary:
Often people who encounter a bug spend a lot of time investigating which changes to the input file will make the bug go away and which changes will not affect it.
This is often time consuming and not very useful, because the way we will find the bug is by running a single example under the debugger with breakpoints, not by pure deduction from a series of examples. We recommend that you save your time for something else.
Of course, if you can find a simpler example to report instead of the original one, that is a convenience for us. Errors in the output will be easier to spot, running under the debugger will take less time, and so on.
However, simplification is not vital; if you do not want to do this, report the bug anyway and send us the entire test case you used.
A patch for the bug does help us if it is a good one. But do not omit the necessary information, such as the test case, on the assumption that a patch is all we need. We might see problems with your patch and decide to fix the problem another way, or we might not understand it at all.
Sometimes with a program as complicated as as it is very hard to
construct an example that will make the program follow a certain path through
the code. If you do not send us the example, we will not be able to construct
one, so we will not be able to verify that the bug is fixed.
And if we cannot understand what bug you are trying to fix, or why your patch should be an improvement, we will not install it. A test case will help us to understand.
Such guesses are usually wrong. Even we cannot guess right about such things without first using the debugger to find the facts.
If you have contributed to as and your name isn't listed here,
it is not meant as a slight. We just don't know about it. Send mail to the
maintainer, and we'll correct the situation. Currently
the maintainer is Ken Raeburn (email address raeburn@cygnus.com).
Dean Elsner wrote the original GNU assembler for the VAX.1
Jay Fenlason maintained GAS for a while, adding support for GDB-specific debug
information and the 68k series machines, most of the preprocessing pass, and
extensive changes in messages.c, input-file.c, write.c.
K. Richard Pixley maintained GAS for a while, adding various enhancements and many bug fixes, including merging support for several processors, breaking GAS up to handle multiple object file format back ends (including heavy rewrite, testing, an integration of the coff and b.out back ends), adding configuration including heavy testing and verification of cross assemblers and file splits and renaming, converted GAS to strictly ANSI C including full prototypes, added support for m680[34]0 and cpu32, did considerable work on i960 including a COFF port (including considerable amounts of reverse engineering), a SPARC opcode file rewrite, DECstation, rs6000, and hp300hpux host ports, updated "know" assertions and made them work, much other reorganization, cleanup, and lint.
Ken Raeburn wrote the high-level BFD interface code to replace most of the code in format-specific I/O modules.
The original VMS support was contributed by David L. Kashtan. Eric Youngdale has done much work with it since.
The Intel 80386 machine description was written by Eliot Dresselhaus.
Minh Tran-Le at IntelliCorp contributed some AIX 386 support.
The Motorola 88k machine description was contributed by Devon Bowen of Buffalo University and Torbjorn Granlund of the Swedish Institute of Computer Science.
Keith Knowles at the Open Software Foundation wrote the original MIPS back end
(tc-mips.c, tc-mips.h), and contributed Rose format support
(which hasn't been merged in yet). Ralph Campbell worked with the MIPS code to
support a.out format.
Support for the Zilog Z8k and Hitachi H8/300 and H8/500 processors (tc-z8k, tc-h8300, tc-h8500), and IEEE 695 object file format (obj-ieee), was written by Steve Chamberlain of Cygnus Support. Steve also modified the COFF back end to use BFD for some low-level operations, for use with the H8/300 and AMD 29k targets.
John Gilmore built the AMD 29000 support, added .include support, and
simplified the configuration of which versions accept which directives. He
updated the 68k machine description so that Motorola's opcodes always produced
fixed-size instructions (e.g. jsr), while synthetic instructions
remained shrinkable (jbsr). John fixed many bugs, including true tested
cross-compilation support, and one bug in relaxation that took a week and
required the proverbial one-bit fix.
Ian Lance Taylor of Cygnus Support merged the Motorola and MIT syntax for the 68k, completed support for some COFF targets (68k, i386 SVR3, and SCO Unix), added support for MIPS ECOFF and ELF targets, wrote the initial RS/6000 and PowerPC assembler, and made a few other minor patches.
Steve Chamberlain made as able to generate listings.
Hewlett-Packard contributed support for the HP9000/300.
Jeff Law wrote GAS and BFD support for the native HPPA object format (SOM) along with a fairly extensive HPPA testsuite (for both SOM and ELF object formats). This work was supported by both the Center for Software Science at the University of Utah and Cygnus Support.
Support for ELF format files has been worked on by Mark Eichin of Cygnus Support (original, incomplete implementation for SPARC), Pete Hoogenboom and Jeff Law at the University of Utah (HPPA mainly), Michael Meissner of the Open Software Foundation (i386 mainly), and Ken Raeburn of Cygnus Support (sparc, and some initial 64-bit support).
Linas Vepstas added GAS support for the ESA/390 "IBM 370" architecture.
Richard Henderson rewrote the Alpha assembler. Klaus Kaempf wrote GAS and BFD support for openVMS/Alpha.
Timothy Wall, Michael Hayes, and Greg Smart contributed to the various tic* flavors.
Several engineers at Cygnus Support have also provided many small bug fixes and configuration enhancements.
Many others have contributed large or small bugfixes and enhancements. If you have contributed significant work and are not mentioned on this list, and want to be, let us know. Some of the history has been lost; we are not intentionally leaving anyone out.
GNU Free Documentation License
Version 1.1, March 2000
Copyright (C) 2000 Free Software Foundation, Inc. 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
Everyone is permitted to copy and distribute verbatim copies of this license document, but changing it is not allowed.
0. PREAMBLE
The purpose of this License is to make a manual, textbook, or other written document "free" in the sense of freedom: to assure everyone the effective freedom to copy and redistribute it, with or without modifying it, either commercially or noncommercially. Secondarily, this License preserves for the author and publisher a way to get credit for their work, while not being considered responsible for modifications made by others.
This License is a kind of "copyleft", which means that derivative works of the document must themselves be free in the same sense. It complements the GNU General Public License, which is a copyleft license designed for free software.
We have designed this License in order to use it for manuals for free software, because free software needs free documentation: a free program should come with manuals providing the same freedoms that the software does. But this License is not limited to software manuals; it can be used for any textual work, regardless of subject matter or whether it is published as a printed book. We recommend this License principally for works whose purpose is instruction or reference.
1. APPLICABILITY AND DEFINITIONS
This License applies to any manual or other work that contains a notice placed by the copyright holder saying it can be distributed under the terms of this License. The "Document", below, refers to any such manual or work. Any member of the public is a licensee, and is addressed as "you".
A "Modified Version" of the Document means any work containing the Document or a portion of it, either copied verbatim, or with modifications and/or translated into another language.
A "Secondary Section" is a named appendix or a front-matter section of the Document that deals exclusively with the relationship of the publishers or authors of the Document to the Document's overall subject (or to related matters) and contains nothing that could fall directly within that overall subject. (For example, if the Document is in part a textbook of mathematics, a Secondary Section may not explain any mathematics.) The relationship could be a matter of historical connection with the subject or with related matters, or of legal, commercial, philosophical, ethical or political position regarding them.
The "Invariant Sections" are certain Secondary Sections whose titles are designated, as being those of Invariant Sections, in the notice that says that the Document is released under this License.
The "Cover Texts" are certain short passages of text that are listed, as Front-Cover Texts or Back-Cover Texts, in the notice that says that the Document is released under this License.
A "Transparent" copy of the Document means a machine-readable copy, represented in a format whose specification is available to the general public, whose contents can be viewed and edited directly and straightforwardly with generic text editors or (for images composed of pixels) generic paint programs or (for drawings) some widely available drawing editor, and that is suitable for input to text formatters or for automatic translation to a variety of formats suitable for input to text formatters. A copy made in an otherwise Transparent file format whose markup has been designed to thwart or discourage subsequent modification by readers is not Transparent. A copy that is not "Transparent" is called "Opaque".
Examples of suitable formats for Transparent copies include plain ASCII without markup, Texinfo input format, LaTeX input format, SGML or XML using a publicly available DTD, and standard-conforming simple HTML designed for human modification. Opaque formats include PostScript, PDF, proprietary formats that can be read and edited only by proprietary word processors, SGML or XML for which the DTD and/or processing tools are not generally available, and the machine-generated HTML produced by some word processors for output purposes only.
The "Title Page" means, for a printed book, the title page itself, plus such following pages as are needed to hold, legibly, the material this License requires to appear in the title page. For works in formats which do not have any title page as such, "Title Page" means the text near the most prominent appearance of the work's title, preceding the beginning of the body of the text.
2. VERBATIM COPYING
You may copy and distribute the Document in any medium, either commercially or noncommercially, provided that this License, the copyright notices, and the license notice saying this License applies to the Document are reproduced in all copies, and that you add no other conditions whatsoever to those of this License. You may not use technical measures to obstruct or control the reading or further copying of the copies you make or distribute. However, you may accept compensation in exchange for copies. If you distribute a large enough number of copies you must also follow the conditions in section 3.
You may also lend copies, under the same conditions stated above, and you may publicly display copies.
3. COPYING IN QUANTITY
If you publish printed copies of the Document numbering more than 100, and the Document's license notice requires Cover Texts, you must enclose the copies in covers that carry, clearly and legibly, all these Cover Texts: Front-Cover Texts on the front cover, and Back-Cover Texts on the back cover. Both covers must also clearly and legibly identify you as the publisher of these copies. The front cover must present the full title with all words of the title equally prominent and visible. You may add other material on the covers in addition. Copying with changes limited to the covers, as long as they preserve the title of the Document and satisfy these conditions, can be treated as verbatim copying in other respects.
If the required texts for either cover are too voluminous to fit legibly, you should put the first ones listed (as many as fit reasonably) on the actual cover, and continue the rest onto adjacent pages.
If you publish or distribute Opaque copies of the Document numbering more than 100, you must either include a machine-readable Transparent copy along with each Opaque copy, or state in or with each Opaque copy a publicly-accessible computer-network location containing a complete Transparent copy of the Document, free of added material, which the general network-using public has access to download anonymously at no charge using public-standard network protocols. If you use the latter option, you must take reasonably prudent steps, when you begin distribution of Opaque copies in quantity, to ensure that this Transparent copy will remain thus accessible at the stated location until at least one year after the last time you distribute an Opaque copy (directly or through your agents or retailers) of that edition to the public.
It is requested, but not required, that you contact the authors of the Document well before redistributing any large number of copies, to give them a chance to provide you with an updated version of the Document.
4. MODIFICATIONS
You may copy and distribute a Modified Version of the Document under the conditions of sections 2 and 3 above, provided that you release the Modified Version under precisely this License, with the Modified Version filling the role of the Document, thus licensing distribution and modification of the Modified Version to whoever possesses a copy of it. In addition, you must do these things in the Modified Version:
A. Use in the Title Page (and on the covers, if any) a title distinct from that of the Document, and from those of previous versions (which should, if there were any, be listed in the History section of the Document). You may use the same title as a previous version if the original publisher of that version gives permission. B. List on the Title Page, as authors, one or more persons or entities responsible for authorship of the modifications in the Modified Version, together with at least five of the principal authors of the Document (all of its principal authors, if it has less than five). C. State on the Title page the name of the publisher of the Modified Version, as the publisher. D. Preserve all the copyright notices of the Document. E. Add an appropriate copyright notice for your modifications adjacent to the other copyright notices. F. Include, immediately after the copyright notices, a license notice giving the public permission to use the Modified Version under the terms of this License, in the form shown in the Addendum below. G. Preserve in that license notice the full lists of Invariant Sections and required Cover Texts given in the Document's license notice. H. Include an unaltered copy of this License. I. Preserve the section entitled "History", and its title, and add to it an item stating at least the title, year, new authors, and publisher of the Modified Version as given on the Title Page. If there is no section entitled "History" in the Document, create one stating the title, year, authors, and publisher of the Document as given on its Title Page, then add an item describing the Modified Version as stated in the previous sentence. J. Preserve the network location, if any, given in the Document for public access to a Transparent copy of the Document, and likewise the network locations given in the Document for previous versions it was based on. These may be placed in the "History" section. You may omit a network location for a work that was published at least four years before the Document itself, or if the original publisher of the version it refers to gives permission. K. In any section entitled "Acknowledgements" or "Dedications", preserve the section's title, and preserve in the section all the substance and tone of each of the contributor acknowledgements and/or dedications given therein. L. Preserve all the Invariant Sections of the Document, unaltered in their text and in their titles. Section numbers or the equivalent are not considered part of the section titles. M. Delete any section entitled "Endorsements". Such a section may not be included in the Modified Version. N. Do not retitle any existing section as "Endorsements" or to conflict in title with any Invariant Section.
If the Modified Version includes new front-matter sections or appendices that qualify as Secondary Sections and contain no material copied from the Document, you may at your option designate some or all of these sections as invariant. To do this, add their titles to the list of Invariant Sections in the Modified Version's license notice. These titles must be distinct from any other section titles.
You may add a section entitled "Endorsements", provided it contains nothing but endorsements of your Modified Version by various parties-for example, statements of peer review or that the text has been approved by an organization as the authoritative definition of a standard.
You may add a passage of up to five words as a Front-Cover Text, and a passage of up to 25 words as a Back-Cover Text, to the end of the list of Cover Texts in the Modified Version. Only one passage of Front-Cover Text and one of Back-Cover Text may be added by (or through arrangements made by) any one entity. If the Document already includes a cover text for the same cover, previously added by you or by arrangement made by the same entity you are acting on behalf of, you may not add another; but you may replace the old one, on explicit permission from the previous publisher that added the old one.
The author(s) and publisher(s) of the Document do not by this License give permission to use their names for publicity for or to assert or imply endorsement of any Modified Version.
5. COMBINING DOCUMENTS
You may combine the Document with other documents released under this License, under the terms defined in section 4 above for modified versions, provided that you include in the combination all of the Invariant Sections of all of the original documents, unmodified, and list them all as Invariant Sections of your combined work in its license notice.
The combined work need only contain one copy of this License, and multiple identical Invariant Sections may be replaced with a single copy. If there are multiple Invariant Sections with the same name but different contents, make the title of each such section unique by adding at the end of it, in parentheses, the name of the original author or publisher of that section if known, or else a unique number. Make the same adjustment to the section titles in the list of Invariant Sections in the license notice of the combined work.
In the combination, you must combine any sections entitled "History" in the various original documents, forming one section entitled "History"; likewise combine any sections entitled "Acknowledgements", and any sections entitled "Dedications". You must delete all sections entitled "Endorsements."
6. COLLECTIONS OF DOCUMENTS
You may make a collection consisting of the Document and other documents released under this License, and replace the individual copies of this License in the various documents with a single copy that is included in the collection, provided that you follow the rules of this License for verbatim copying of each of the documents in all other respects.
You may extract a single document from such a collection, and distribute it individually under this License, provided you insert a copy of this License into the extracted document, and follow this License in all other respects regarding verbatim copying of that document.
7. AGGREGATION WITH INDEPENDENT WORKS
A compilation of the Document or its derivatives with other separate and independent documents or works, in or on a volume of a storage or distribution medium, does not as a whole count as a Modified Version of the Document, provided no compilation copyright is claimed for the compilation. Such a compilation is called an "aggregate", and this License does not apply to the other self-contained works thus compiled with the Document, on account of their being thus compiled, if they are not themselves derivative works of the Document.
If the Cover Text requirement of section 3 is applicable to these copies of the Document, then if the Document is less than one quarter of the entire aggregate, the Document's Cover Texts may be placed on covers that surround only the Document within the aggregate. Otherwise they must appear on covers around the whole aggregate.
8. TRANSLATION
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10. FUTURE REVISIONS OF THIS LICENSE
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#: Comments
#APP: Preprocessing
#NO_APP: Preprocessing
$ in symbol names: SH64-Chars, SH-Chars, H8/500-Chars, D30V-Chars, D10V-Chars
-+ option, VAX/VMS: VAX-Opts
--: Command Line
--32 option, i386: i386-Options
--32 option, x86-64: i386-Options
--64 option, i386: i386-Options
--64 option, x86-64: i386-Options
--base-size-default-16: M68K-Opts
--base-size-default-32: M68K-Opts
--bitwise-or option, M680x0: M68K-Opts
--disp-size-default-16: M68K-Opts
--disp-size-default-32: M68K-Opts
--emulation=crisaout command line option, CRIS: CRIS-Opts
--emulation=criself command line option, CRIS: CRIS-Opts
--enforce-aligned-data: Sparc-Aligned-Data
--fatal-warnings--fixed-special-register-names command line option, MMIX: MMIX-Opts
--force-long-branchs: M68HC11-Opts
--generate-example: M68HC11-Opts
--globalize-symbols command line option, MMIX: MMIX-Opts
--gnu-syntax command line option, MMIX: MMIX-Opts
--linker-allocated-gregs command line option, MMIX: MMIX-Opts
--listing-cont-lines: listing
--listing-lhs-width: listing
--listing-lhs-width2: listing
--listing-rhs-width: listing
--MD: MD
--no-expand command line option, MMIX: MMIX-Opts
--no-merge-gregs command line option, MMIX: MMIX-Opts
--no-predefined-syms command line option, MMIX: MMIX-Opts
--no-underscore command line option, CRIS: CRIS-Opts
--no-warn--pcrel: M68K-Opts
--pic command line option, CRIS: CRIS-Opts
--print-insn-syntax: M68HC11-Opts
--print-opcodes: M68HC11-Opts
--register-prefix-optional option, M680x0: M68K-Opts
--relax command line option, MMIX: MMIX-Opts
--short-branchs: M68HC11-Opts
--statistics: statistics
--strict-direct-mode: M68HC11-Opts
--traditional-format: traditional-format
--underscore command line option, CRIS: CRIS-Opts
--warn-1 option, VAX/VMS: VAX-Opts
-32addr command line option, Alpha: Alpha Options
-a: a
-A options, i960: Options-i960
-ac: a
-ad: a
-ah: a
-al: a
-an: a
-as: a
-Asparclet: Sparc-Opts
-Asparclite: Sparc-Opts
-Av6: Sparc-Opts
-Av8: Sparc-Opts
-Av9: Sparc-Opts
-Av9a: Sparc-Opts
-b option, i960: Options-i960
-big: SH Options
-D: D
-D, ignored on VAX: VAX-Opts
-d, VAX option: VAX-Opts
-dsp: SH Options
-EB command line option, ARC: ARC Options
-EB command line option, ARM: ARM Options
-EB option (MIPS): MIPS Opts
-EL command line option, ARC: ARC Options
-EL command line option, ARM: ARM Options
-EL option (MIPS): MIPS Opts
-f: f
-F command line option, Alpha: Alpha Options
-G command line option, Alpha: Alpha Options
-g command line option, Alpha: Alpha Options
-G option (MIPS): MIPS Opts
-H option, VAX/VMS: VAX-Opts
-h option, VAX/VMS: VAX-Opts
-I path: I
-J, ignored on VAX: VAX-Opts
-K: K
-k command line option, ARM: ARM Options
-L: L
-l option, M680x0: M68K-Opts
-little: SH Options
-M: M
-m32r option, M32R: M32R-Opts
-m32rx option, M32RX: M32R-Opts
-m68000 and related options: M68K-Opts
-m68hc11: M68HC11-Opts
-m68hc12: M68HC11-Opts
-mapcs command line option, ARM: ARM Options
-mapcs-float command line option, ARM: ARM Options
-mapcs-reentrant command line option, ARM: ARM Options
-marc[5|6|7|8] command line option, ARC: ARC Options
-march= command line option, ARM: ARM Options
-matpcs command line option, ARM: ARM Options
-mcpu command line option, Alpha: Alpha Options
-mcpu= command line option, ARM: ARM Options
-mdebug command line option, Alpha: Alpha Options
-mfpu= command line option, ARM: ARM Options
-moabi command line option, ARM: ARM Options
-mthumb command line option, ARM: ARM Options
-mthumb-interwork command line option, ARM: ARM Options
-mv850 command line option, V850: V850 Options
-mv850any command line option, V850: V850 Options
-mv850e command line option, V850: V850 Options
-N command line option, CRIS: CRIS-Opts
-no-mdebug command line option, Alpha: Alpha Options
-no-relax option, i960: Options-i960
-no-warn-explicit-parallel-conflicts option, M32RX: M32R-Opts
-nocpp ignored (MIPS): MIPS Opts
-o: o
-R: R
-relax: SH Options
-relax command line option, Alpha: Alpha Options
-S, ignored on VAX: VAX-Opts
-small: SH Options
-t, ignored on VAX: VAX-Opts
-T, ignored on VAX: VAX-Opts
-v: v
-V, redundant on VAX: VAX-Opts
-version: v
-W-warn-explicit-parallel-conflicts option, M32RX: M32R-Opts
-Wnp option, M32RX: M32R-Opts
-Wp option, M32RX: M32R-Opts
-wsigned_overflow command line option, V850: V850 Options
-wunsigned_overflow command line option, V850: V850 Options
-x command line option, MMIX: MMIX-Opts
. (symbol): Dot
.hidden directive: Hidden
.insn.internal directive: Internal
.ltorg directive, ARM: ARM Directives
.o: Object
.param on HPPA: HPPA Directives
.pool directive, ARM: ARM Directives
.popsection directive: PopSection
.previous directive: Previous
.protected directive: Protected
.pushsection directive: PushSection
.set autoextend.set mipsn.set noautoextend.set pop.set push.subsection directive: SubSection
.v850 directive, V850: V850 Directives
.v850e directive, V850: V850 Directives
.version: Version
.vtable_entry: VTableEntry
.vtable_inherit: VTableInherit
.weak: Weak
2byte directive, ARC: ARC Directives
3byte directive, ARC: ARC Directives
4byte directive, ARC: ARC Directives
: (label): Statements
\" (doublequote character): Strings
\\ (\ character): Strings
\b (backspace character): Strings
\ddd (octal character code): Strings
\f (formfeed character): Strings
\n (newline character): Strings
\r (carriage return character): Strings
\t (tab): Strings
\xd... (hex character code): Strings
a.out: Object
a.out symbol attributes: a.out Symbols
ABORT directive: ABORT
abort directive: Abort
ADR reg,<label> pseudo op, ARM: ARM Opcodes
ADRL reg,<label> pseudo op, ARM: ARM Opcodes
align directive: Align
align directive, ARM: ARM Directives
align directive, M88K: M88K Directives
align directive, SPARC: Sparc-Directives
arc5 arc5, ARC: ARC Options
arc6 arc6, ARC: ARC Options
arc7 arc7, ARC: ARC Options
arc8 arc8, ARC: ARC Options
arm directive, ARM: ARM Directives
ascii directive: Ascii
asciz directive: Asciz
atmp directive, i860: Directives-i860
Av7: Sparc-Opts
\\): Strings
\b): Strings
balign directive: Balign
balignl directive: Balign
balignw directive: Balign
block: Z8000 Directives
block directive, AMD 29K: AMD29K Directives
bss directive, i960: Directives-i960
bss directive, M88K: M88K Directives
bval: Z8000 Directives
byte directive: Byte
callj, i960 pseudo-opcode: callj-i960
\r): Strings
code directive, ARM: ARM Directives
code16 directive, i386: i386-16bit
code16gcc directive, i386: i386-16bit
code32 directive, i386: i386-16bit
code64 directive, i386: i386-16bit
code64 directive, x86-64: i386-16bit
comm directive: Comm
common directive, SPARC: Sparc-Directives
cputype directive, AMD 29K: AMD29K Directives
--emulation=crisaout command line option: CRIS-Opts
--emulation=criself command line option: CRIS-Opts
--no-underscore command line option: CRIS-Opts
--pic command line option: CRIS-Opts
--underscore command line option: CRIS-Opts
-N command line option: CRIS-Opts
ctbp register, V850: V850-Regs
ctoff pseudo-op, V850: V850 Opcodes
ctpc register, V850: V850-Regs
ctpsw register, V850: V850-Regs
data directive: Data
data1 directive, M680x0: M68K-Directives
data2 directive, M680x0: M68K-Directives
dbpc register, V850: V850-Regs
dbpsw register, V850: V850-Regs
def directive: Def
def directive, M88K: M88K Directives
desc directive: Desc
a.out symbol: Symbol Desc
dfloat directive, M88K: M88K Directives
dfloat directive, VAX: VAX-directives
dim directive: Dim
double directive: Double
double directive, i386: i386-Float
double directive, M680x0: M68K-Float
double directive, M68HC11: M68HC11-Float
double directive, VAX: VAX-float
double directive, x86-64: i386-Float
\"): Strings
dual directive, i860: Directives-i860
ecr register, V850: V850-Regs
eipc register, V850: V850-Regs
eipsw register, V850: V850-Regs
eject directive: Eject
else directive: Else
elseif directive: Elseif
end directive: End
enddual directive, i860: Directives-i860
endef directive: Endef
endfunc directive: Endfunc
endif directive: Endif
endm directive: Macro
ep register, V850: V850-Regs
equ directive: Equ
equiv directive: Equiv
err directive: Err
even: Z8000 Directives
even directive, M680x0: M68K-Directives
exitm directive: Macro
extAuxRegister directive, ARC: ARC Directives
extCondCode directive, ARC: ARC Directives
extCoreRegister directive, ARC: ARC Directives
extend directive M680x0: M68K-Float
extend directive M68HC11: M68HC11-Float
extended directive, i960: Directives-i960
extern directive: Extern
extInstruction directive, ARC: ARC Directives
fail directive: Fail
-f): f
fepc register, V850: V850-Regs
fepsw register, V850: V850-Regs
ffloat directive, M88K: M88K Directives
ffloat directive, VAX: VAX-directives
file directive: File
file directive, AMD 29K: AMD29K Directives
fill directive: Fill
float directive: Float
float directive, i386: i386-Float
float directive, M680x0: M68K-Float
float directive, M68HC11: M68HC11-Float
float directive, VAX: VAX-float
float directive, x86-64: i386-Float
force_thumb directive, ARM: ARM Directives
\f): Strings
func directive: Func
gbr960, i960 postprocessor: Options-i960
gfloat directive, VAX: VAX-directives
global: Z8000 Directives
global directive: Global
gp register, MIPS: MIPS Object
gp register, V850: V850-Regs
half directive, ARC: ARC Directives
half directive, M88K: M88K Directives
half directive, SPARC: Sparc-Directives
\xd...): Strings
hfloat directive, VAX: VAX-directives
hi pseudo-op, V850: V850 Opcodes
hi0 pseudo-op, V850: V850 Opcodes
hilo pseudo-op, V850: V850 Opcodes
hword directive: hword
mul, imul instructions: i386-Notes
callj pseudo-opcode: callj-i960
ident directive: Ident
if directive: If
ifc directive: If
ifdef directive: If
ifeq directive: If
ifeqs directive: If
ifge directive: If
ifgt directive: If
ifle directive: If
iflt directive: If
ifnc directive: If
ifndef directive: If
ifne directive: If
ifnes directive: If
ifnotdef directive: If
imul instruction, i386: i386-Notes
imul instruction, x86-64: i386-Notes
incbin directive: Incbin
include directive: Include
include directive search path: I
int directive: Int
int directive, H8/300: H8/300 Directives
int directive, H8/500: H8/500 Directives
int directive, i386: i386-Float
int directive, x86-64: i386-Float
irp directive: Irp
irpc directive: Irpc
:): Statements
lcomm directive: Lcomm
ld: Object
ldouble directive M680x0: M68K-Float
ldouble directive M68HC11: M68HC11-Float
LDR reg,=<label> pseudo op, ARM: ARM Opcodes
leafproc directive, i960: Directives-i960
lflags directive (ignored): Lflags
line directive: Line
line directive, AMD 29K: AMD29K Directives
#: Comments
linkonce directive: Linkonce
list directive: List
ln directive: Ln
lo pseudo-op, V850: V850 Opcodes
long directive: Long
long directive, ARC: ARC Directives
long directive, i386: i386-Float
long directive, x86-64: i386-Float
lp register, V850: V850-Regs
lval: Z8000 Directives
macro directive: Macro
mri directive: MRI
mul instruction, i386: i386-Notes
mul instruction, x86-64: i386-Notes
name: Z8000 Directives
\n): Strings
nolist directive: Nolist
NOP pseudo op, ARM: ARM Opcodes
nword directive, SPARC: Sparc-Directives
octa directive: Octa
\ddd): Strings
offset directive, V850: V850 Directives
option directive, ARC: ARC Directives
org directive: Org
a.out symbol: Symbol Other
p2align directive: P2align
p2alignl directive: P2align
p2alignw directive: P2align
.include: I
print directive: Print
proc directive, SPARC: Sparc-Directives
psize directive: Psize
psw register, V850: V850-Regs
purgem directive: Purgem
quad directive: Quad
quad directive, i386: i386-Float
quad directive, x86-64: i386-Float
register directive, SPARC: Sparc-Directives
rept directive: Rept
req directive, ARM: ARM Directives
reserve directive, SPARC: Sparc-Directives
rsect: Z8000 Directives
sbttl directive: Sbttl
scl directive: Scl
sdaoff pseudo-op, V850: V850 Opcodes
.include: I
sect directive, AMD 29K: AMD29K Directives
section directive: Section
section directive, V850: V850 Directives
seg directive, SPARC: Sparc-Directives
segm: Z8000 Directives
set directive: Set
set directive, M88K: M88K Directives
short directive: Short
short directive, ARC: ARC Directives
single directive: Single
single directive, i386: i386-Float
single directive, x86-64: i386-Float
size directive: Size
skip directive: Skip
skip directive, M680x0: M68K-Directives
skip directive, SPARC: Sparc-Directives
sleb128 directive: Sleb128
sp register, V850: V850-Regs
space directive: Space
stabd directive: Stab
stabn directive: Stab
stabs directive: Stab
stabx directives: Stab
string directive: String
string directive on HPPA: HPPA Directives
string directive, M88K: M88K Directives
struct directive: Struct
sval: Z8000 Directives
a.out: a.out Symbols
$ in: SH64-Chars, SH-Chars, H8/500-Chars, D30V-Chars, D10V-Chars
symver directive: Symver
sysproc directive, i960: Directives-i960
\t): Strings
tag directive: Tag
tdaoff pseudo-op, V850: V850 Opcodes
text directive: Text
tfloat directive, i386: i386-Float
tfloat directive, x86-64: i386-Float
thumb directive, ARM: ARM Directives
thumb_func directive, ARM: ARM Directives
thumb_set directive, ARM: ARM Directives
title directive: Title
tp register, V850: V850-Regs
type directive: Type
ualong directive, SH: SH Directives
uaword directive, SH: SH Directives
uleb128 directive: Uleb128
unsegm: Z8000 Directives
use directive, AMD 29K: AMD29K Directives
val directive: Val
word directive: Word
word directive, ARC: ARC Directives
word directive, H8/300: H8/300 Directives
word directive, H8/500: H8/500 Directives
word directive, i386: i386-Float
word directive, M88K: M88K Directives
word directive, SPARC: Sparc-Directives
word directive, x86-64: i386-Float
wval: Z8000 Directives
xword directive, SPARC: Sparc-Directives
zdaoff pseudo-op, V850: V850 Opcodes
zero register, V850: V850-Regs
-a[cdhlns]
-D
-f
.include search path: -I path
-K
-L
--listing
-M
--MD
-o
-R
--statistics
--traditional-format
-v
-W, --warn, --no-warn, --fatal-warnings
-Z
.abort
.ABORT
.align abs-expr, abs-expr, abs-expr
.ascii "string"...
.asciz "string"...
.balign[wl] abs-expr, abs-expr, abs-expr
.byte expressions
.comm symbol , length
.data subsection
.def name
.desc symbol, abs-expression
.dim
.double flonums
.eject
.else
.elseif
.end
.endef
.endfunc
.endif
.equ symbol, expression
.equiv symbol, expression
.err
.exitm
.extern
.fail expression
.file string
.fill repeat , size , value
.float flonums
.func name[,label]
.global symbol, .globl symbol
.hidden names
.hword expressions
.ident
.if absolute expression
.incbin "file"[,skip[,count]]
.include "file"
.int expressions
.internal names
.irp symbol,values...
.irpc symbol,values...
.lcomm symbol , length
.lflags
.line line-number
.linkonce [type]
.ln line-number
.mri val
.list
.long expressions
.macro
.nolist
.octa bignums
.org new-lc , fill
.p2align[wl] abs-expr, abs-expr, abs-expr
.previous
.popsection
.print string
.protected names
.psize lines , columns
.purgem name
.pushsection name , subsection
.quad bignums
.rept count
.sbttl "subheading"
.scl class
.section name (COFF version)
.section name (ELF version)
.set symbol, expression
.short expressions
.single flonums
.size (COFF version)
.size name , expression (ELF version)
.sleb128 expressions
.skip size , fill
.space size , fill
.stabd, .stabn, .stabs
.string "str"
.struct expression
.subsection name
.symver
.tag structname
.text subsection
.title "heading"
.type int (COFF version)
.type name , type description (ELF version)
.uleb128 expressions
.val addr
.version "string"
.vtable_entry table, offset
.vtable_inherit child, parent
.weak names
.word expressions